
Corrections and Supplementary Explanation for M37920FxC Datasheet (REV.A) NO.1
Page
Error
Correction
(1/6)
Page 4,
BLOCK
DIAGRAM
Note:
RAM
2048 bytes
4096 bytes
6144 bytes
M37920F8CGP,M37920F8CHP
M37920FCCGP,M37920FCCHP
M37920FGCGP,M37920FGCHP
Flash memory
60 Kbytes
120 Kbytes
248 Kbytes
Note:
All pages,
Header
Page 3,
PIN
CONFIGURATION
Page 121,
Fig. 119,
Pin connection of
M37920FxCHP in
flash memory
M37920F8CGP, M37920F8CHP, M37920FCCGP,
M37920FCCHP, M37920FGCGP, M37920FGCHP
M37920FCCGP, M37920FCCHP, M37920FGCGP,
M37920FGCHP
Page 1
DISTINCTIVE
FEATURES ;
Memory
[M37920F8CGP, M37920F8CHP]
Flash memory (User ROM area) ......................60 Kbytes
RAM.................................................................2048 bytes
(Deleted)
M37920F8CHP
M37920FCCHP
M37920FGCHP
M37920FCCHP
M37920FGCHP
(Type)
Page 5,
Chip-select
wait control
Chip select area 4 (CS0–CS3). A wait number and
bus width can be set for each chip select area.
Chip select area 4 (CS0–CS3). A bus cycle type
and bus width can be set for each chip select area.
Page 2,
PIN
CONFIGURATION
Page 120,
Fig. 118,
Pin connection of
M37920FxCGP in
flash memory
M37920F8CGP
M37920FCCGP
M37920FGCGP
M37920FCCGP
M37920FGCGP
(Type)
RAM
4096 bytes
6144 bytes
M37920FCCGP,M37920FCCHP
M37920FGCGP,M37920FGCHP
Flash memory
120 Kbytes
248 Kbytes
Page 5,
Parameter
Operating temperature range
Operating ambient temperature range
Page 5,
Note:
RAM
2048 bytes
4096 bytes
6144 bytes
M37920F8CGP,M37920F8CHP
M37920FCCGP,M37920FCCHP
M37920FGCGP,M37920FGCHP
Flash memory
(User ROM
area)
60 Kbytes
120 Kbytes
248 Kbytes
M37920F8CGP,M37920F8CHP
M37920FCCGP,M37920FCCHP
M37920FGCGP,M37920FGCHP
Note:
RAM
4096 bytes
M37920FCCGP,M37920FCCHP
Flash memory
(User ROM
area)
120 Kbytes
M37920FCCGP,M37920FCCHP
M37920FGCGP,M37920FGCHP
248 Kbytes
M37920FGCGP,M37920FGCHP
6144 bytes
Page 6,
Note
User ROM
area
M37920F8CGP, M37920F8CHP
4 blocks
M37920FCCGP, M37920FCCHP
5 blocks
M37920FGCGP, M37920FGCHP 7 blocks
Note:
User ROM
area
M37920FCCGP, M37920FCCHP
5 blocks
M37920FGCGP, M37920FGCHP 7 blocks
Note:
Page 1
DESCRIPTION;
Lines 11, 12
These microcomputers include the 4-channel DMA
controller and the DRAM controller with enhanced fast
page mode.
These microcomputers include the 4-channel DMA
controller and the DRAM controller.
Page 1
DISTINCTIVE
FEATURES ;
Interrupts
Interrupts ......................6 external sources, 17 internal
sources, 7 levels
Interrupts ......................6 external sources, 20 internal
sources, 7 levels
Page 5,
DRAM
controller
1 channel
Supports fast page access mode.
Incorparates 8-bit refresh timer.
Supports CAS before RAS refresh method
1 channel
Incorparates 8-bit refresh timer.
Supports CAS before RAS refresh method
Page 5,
Interrupts
6 external types, 17 internal types. Each interrupt
6 external types, 20 internal types. Each interrupt