參數(shù)資料
型號: M37920FCCGP
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, 20 MHz, MICROCONTROLLER, PQFP100
封裝: 14 X 20 MM, 0.65 MM PITCH, PLASTIC, QFP-100
文件頁數(shù): 8/158頁
文件大小: 1261K
代理商: M37920FCCGP
105
M37920FCCGP, M37920FCCHP
M37920FGCGP, M37920FGCHP
PRELIMINAR
Y
Notice:
This
is not
a final
specification.
Some
parametric
limits
are
subject
to change.
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER FLASH MEMORY VERSION
MITSUBISHI MICROCOMPUTERS
POWER SAVING FUNCTION
The following functions can save the power dissipation of the whole
system.
(1) Bus fixation in STP and WIT modes
By setting the standby state select bit (bit 2 of the particular function
select register 1) to “1”, in the stop or wait state, the I/O pins of the
external buses and bus control signals can be switched to program-
mable I/O port pins. By setting these pins’ state with the correspond-
ing port registers and port direction registers, unnecessary current
will not flow between the microcomputer and external devices. As a
result, in the stop or wait mode, the power dissipation of the whole
system can be saved. Table 24 lists the correspondence between
the external buses, bus control signals, and programmable I/O port
pins.
This function is valid only in the stop or wait state. At termination of
the stop or wait mode, the original functions of external buses and
bus control signals become valid.
Table 24. Correspondence between external buses, bus control sig-
nals, and programmable I/O port pins
External buses,
Bus control signals
A0 to A7,
A8 to A15,
A16 to A23
0
Standby state select bit
A0 to A7,
A8 to A15,
A16 to A23
1
D0 to D7,
D8 to D15 (Note 1)
D0 to D7,
D8 to D15
P100 to P107 (Note 2),
P110 to P117 (Note 2),
P00 to P07 (Note 2)
P10 to P17 (Note 2),
P20 to P27
RD, BLW,
BHW
RD, BLW,
BHW (Note 1)
P31, P32 (Note 2),
P33
CS0
P90 (Note 2)
Notes 1: When the external data bus width = 8 bits (BYTE = VCC level),
this becomes a programmable I/O port pin, regardless of the
standby state select bit’s contents.
2: Pin functions of port pins P0, P1, P31, P32, P90, P10, P11 are
not shown in the pin configuration. However, relationship with
corresponding bus signals and ports is listed in Table 24. For
the addresses of these port’s registers and direction registers,
refer to the location of the perpheral devices’ control register
(Figures 4 and 5).
(2) Stop of internal clock in wait mode
In the WIT mode, if the internal peripheral devices need not to be
operated, be sure to set the internal clock stop select bit at WIT (bit 3
of the particular function select register 1) to “1”. As a result, the clock
source for each internal peripheral device is stopped, and the power
dissipation of the microcomputer can be saved.
For details, refer to the section on the Stop and Wait modes.
(3) Stop of oscillation circuit
When an externally-generated-stable clock is input to pin XIN, the
power dissipation can be saved if both of the following conditions are
met:
the external clock input select bit (bit 1 of the particular function
select register 0) = “1”.
the oscillation driver circuit between pins XIN and XOUT stops its
operation.
At this time, the output level at pin XOUT is fixed to “H”. When the STP
mode is terminated by an interrupt request occurrence, the watch-
dog timer is not used. Therefore, an instruction can be executed just
after the termination of the STP mode. For details, refer to the sec-
tion on the clock generating circuit and stop and wait modes.
(4) Disconnection from pin VREF
When not using the A-D converter, by setting the VREF connection
select bit (bit 6 of the A-D control register 1) to “1”, the ladder network
of the A-D converter will be disconnected from the reference voltage
input pin (VREF). In this case, no current flows from pin VREF to the
ladder network, and the power dissipation can be saved. Note that,
after the VREF connection select bit changes from “1” (VREF discon-
nected) to “0” (VREF connected), be sure that the A-D conversion
starts a period of 1 s or more has elapsed. For details, refer to the
section on the A-D converter.
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