參數(shù)資料
型號(hào)： M37920FCCGP
元件分類： 微控制器/微處理器
英文描述： 16-BIT, FLASH, 20 MHz, MICROCONTROLLER, PQFP100
封裝： 14 X 20 MM, 0.65 MM PITCH, PLASTIC, QFP-100
文件頁(yè)數(shù)： 63/158頁(yè)
文件大小： 1261K
代理商： M37920FCCGP
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Corrections and Supplementary Explanation for M37920FxC Datasheet (REV.A) NO.3
Page
Error
Correction
(3/6)
Page 35,
Fig. 17,
Area CSx start
address register
(x = 0 to 3)
Area CSx start address register
(x = 1, 2)
0
1
0
1
When mode 0 is
Area CSx start address register
(x = 1, 2)
When mode 0 is
“0” at read.
2
Area CSx start address register
(x = 0, 3)
0
1
0
1
These bits determine
Area CS3 start address register
(x = 0, 3)
“0” at read.
2
These bits determine
Page 61,
Interrupt
request at
completion of
reception
control register 0 (UART receive interrupt mode
select bit)
control register 0 (UARTk receive interrupt mode
select bit)
Page 51,
Left column,
Lines 14, 17,
22
timer Ai start bit
count start bit
(Line 9)
UARTi receive interrupt mode select bit
(Lines 18, 20)
UARTk receive interrupt mode select bit
(Lines 18, 20)
Ladder network
Resistor ladder network
Page 67,
Fig. 63
Page 68,
VREF connection
the ladder network or not
the resistor ladder network or not
the ladder network can be cut off by disconnecting ladder
network
the resistor ladder network can be cut off by disconnect-
ing resistor ladder network
(Lines 2, 3)
(Line 7)
Notes 1: After reset, this bit’s contents can be switched
only once. During the software execution, be
sure not to switch this bit’s contents.
2: In the single-chip mode, these bits’ functions
are disabled regardless of these bits’ contents.
3: While VSS level voltage is applied to pin MD0,
each of these bits is “0” at reset. While VCC
level voltage is applied to pin MD0, on the
other hand, each of these bits is “1” at reset.
4: In the memory expansion or microprocessor
mode, if this bit’s contents is switched from “1”
to “0”, this bit will be cleared to “0”.
After this clearance, this bit cannot return to
“1”. If it is necessary to set this bit to “1”, be
sure to reset the microcomputer.
5: In the microprocessor mode, this bit is invalid.
When the internal flash memory is reprogram-
med in the CPU reprogramming mode, be
sure to clear this bit to “0”.
Page 28,
Fig. 12
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