參數(shù)資料
型號: M37920FCCGP
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, 20 MHz, MICROCONTROLLER, PQFP100
封裝: 14 X 20 MM, 0.65 MM PITCH, PLASTIC, QFP-100
文件頁數(shù): 80/158頁
文件大小: 1261K
代理商: M37920FCCGP
M37920FCCGP, M37920FCCHP
M37920FGCGP, M37920FGCHP
PRELIMINAR
Y
Notice:
This
is not
a final
specification.
Some
parametric
limits
are
subject
to change.
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER FLASH MEMORY VERSION
MITSUBISHI MICROCOMPUTERS
28
Single-chip
mode
SFR
Unused area
RAM
ROM
Unused area
Reserved area
(Note)
Memory expansion
mode
: External memory area.
Note: Do not access this area.
SFR
RAM
ROM
Reserved area
(Note)
Microprocessor
mode
SFR
RAM
016
FF16
FEFFFF16
FF000016
FFFFFF16
Fig. 13 Memory maps in three processor modes
Fig. 12 Bit configuration of processor mode register 1
7
6
543
2
1
0
Processor mode register 1
Fix this bit to “0”.
RDY input select bit (Notes 2 to 4)
0 : RDY input is disabled. (P30 functions as a programmable I/O port pin.)
1 : RDY input is enabled. (P30 functions as pin RDY.)
ALE output select bit (Notes 2 and 3)
0 : ALE output is disabled. (P40 functions as a programmable I/O port pin.)
1 : ALE output is enabled. (P40 functions as pin ALE.)
Direct page register switch bit (Note 1)
0 : Only DPR0 is used.
1 : DPR0 to DPR3 are used.
Recovery cycle insert select bit (Notes 2 and 3)
0 : No recovery cycle is inserted at access to the external area.
1 : Recovery cycle is inserted at access to the external area.
Address
5F16
HOLD input, HLDA output select bit (Notes 2 to 4)
0 : HOLD input and HLDA output are disabled.
(P43 and P44 function as programmable I/O port pins.)
1 : HOLD input and HLDA output are enabled.
(P43 and P44 function as pins HOLD and HLDA, respectively.)
“0” at read.
Internal ROM access wait bit (Note 5)
0 : 1 wait
1 : 0 wait
00
Notes 1: After reset, this bit’s contents can be switched only once. During the software execution, be sure not to switch this bit’s contents.
2: In the single-chip mode, these bits’ functions are disabled regardless of these bits’ contents.
3: While VSS level voltage is applied to pin MD0, each of these bits is “0” at reset. While VCC level voltage is applied to pin MD0,
on the other hand, each of these bits is “1” at reset.
4: In the memory expansion or microprocessor mode, if this bit’s contents is switched from “1” to “0”, this bit will be cleared to “0”.
After this clearance, this bit cannot return to “1”. If it is necessary to set this bit to “1”, be sure to reset the microcomputer.
5: In the microprocessor mode, this bit is invalid.
When the internal flash memory is reprogrammed in the CPU reprogramming mode, be sure to clear this bit to “0”.
VSS
VCC
MD0
After reset is removed, the
single-chip mode is selected.
By changing the processor
mode bits’ contents by soft-
ware, the single-chip mode,
memory expansion mode or
microprocessor mode can be
selected.
Description
Mode
After reset is removed, the mi-
croprocessor mode is se-
lected.
Single-chip mode
Memory expansion mode
Microprocessor mode
Table 9. Selection method of processor mode
Microprocessor mode
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