參數(shù)資料
型號: MFRC52301HN1
廠商: NXP Semiconductors N.V.
元件分類: 通信及網(wǎng)絡
英文描述: Contactless reader IC
封裝: MFRC52301HN1<SOT617-1 (HVQFN32)|<<http://www.nxp.com/packages/SOT617-1.html<1<Always Pb-free,;MFRC52301HN1<SOT617-1 (HVQFN32)|<<http://www.nxp.com/packages/SOT617-1.html&
文件頁數(shù): 10/98頁
文件大?。?/td> 1666K
代理商: MFRC52301HN1
MFRC523
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
COMPANY PUBLIC
Rev. 3.7 — 8 November 2011
115237
10 of 98
NXP Semiconductors
MFRC523
Contactless reader IC
Table 5.
Pin
8.3.2
Serial Peripheral Interface
The 5-wire Serial Peripheral Interface (SPI) is supported and enables high-speed
communication with the host. The interface can manage data speeds up to 10 Mbit/s.
When communicating with a host, the MFRC523 acts as a slave. As such, it receives data
from the external host for register settings, sends and receives data relevant for RF
interface communication.
An interface compatible with SPI enables high-speed serial communication between the
MFRC523 and a microcontroller. The implemented interface meets with the SPI standard.
The timing specification is given in
Section 14.1 on page 76
.
The MFRC523 acts as a slave during SPI communication and is timed using the SPI clock
signal (SCK) generated by the master. Data communication from the master to the slave
uses the MOSI line. The MISO line is used to send data from the MFRC523 to the master.
Data bytes on both MOSI and MISO lines are sent with the MSB first. Data on both MOSI
and MISO lines must be stable on the rising edge of the clock and can be changed on the
falling edge. Data is sent by the MFRC523 on the falling clock edge and is stable during
the rising clock edge.
8.3.2.1
SPI read data
Reading data using SPI requires the byte order shown in
Table 6
to be used. It is possible
to read out up to n-data bytes.
Connection protocol for detecting different interface types
Interface type
UART (input)
RX
0
0
TX
MX
DTRQ
-
-
-
-
SPI (output)
NSS
0
1
MISO
MOSI
SCK
-
-
-
-
I
2
C-bus (I/O)
SDA
1
EA
SCL
ADR_0
ADR_1
ADR_2
ADR_3
ADR_4
ADR_5
SDA
I2C
EA
D7
D6
D5
D4
D3
D2
D1
Fig 7.
SPI connection to host
001aal159
MFRC523
SCK
SCK
MOSI
MOSI
MISO
MISO
NSS
NSS
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