參數(shù)資料
型號(hào): MFRC52301HN1
廠商: NXP Semiconductors N.V.
元件分類: 通信及網(wǎng)絡(luò)
英文描述: Contactless reader IC
封裝: MFRC52301HN1<SOT617-1 (HVQFN32)|<<http://www.nxp.com/packages/SOT617-1.html<1<Always Pb-free,;MFRC52301HN1<SOT617-1 (HVQFN32)|<<http://www.nxp.com/packages/SOT617-1.html&
文件頁數(shù): 71/98頁
文件大小: 1666K
代理商: MFRC52301HN1
MFRC523
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
COMPANY PUBLIC
Rev. 3.7 — 8 November 2011
115237
71 of 98
NXP Semiconductors
MFRC523
Contactless reader IC
Remark:
When the MFAuthent command is active all access to the FIFO buffer is
blocked. However, if there is access to the FIFO buffer, the ErrorReg register’s WrErr bit is
set.
This command automatically terminates when the MIFARE card is authenticated and the
Status2Reg register’s MFCrypto1On bit is set to logic 1.
This command does not terminate automatically if the card does not answer, so the timer
must be initialized to automatic mode. In this case, in addition to the IdleIRq bit, the
TimerIRq bit can be used as the termination criteria. During authentication processing, the
RxIRq bit and TxIRq bit are blocked. The Crypto1On bit is only valid after termination of
the MFAuthent command, either after processing the protocol or writing Idle to the
CommandReg register.
If an error occurs during authentication, the ErrorReg register’s ProtocolErr bit is set to
logic 1 and the Status2Reg register’s Crypto1On bit is set to logic 0.
10.3.1.10
SoftReset command
This command performs a reset of the device. The configuration data of the internal buffer
remains unchanged. All registers are set to the reset values. This command automatically
terminates when finished.
Remark:
The SerialSpeedReg register is reset and therefore the serial data rate is set to
9.6 kBd.
11. Limiting values
Table 151. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
V
DDA
analog supply voltage
V
DDD
digital supply voltage
V
DD(PVDD)
PVDD supply voltage
V
DD(TVDD)
TVDD supply voltage
V
DD(SVDD)
SVDD supply voltage
V
I
input voltage
Conditions
Min
0.5
0.5
0.5
0.5
0.5
V
SS(PVSS)
0.5 V
DD(PVDD)
+ 0.5 V
Max
+4.0
+4.0
+4.0
+4.0
+4.0
Unit
V
V
V
V
V
all input pins except pins MFIN and
RX
pin MFIN
per package; V
DDD
in shortcut
mode
V
SS(PVSS)
0.5 V
DD(SVDD)
+ 0.5 V
-
200
P
tot
total power dissipation
mW
T
j
V
ESD
junction temperature
electrostatic discharge voltage HBM; 1500
, 100 pF;
-
-
100
2000
C
V
JESD22-A114-B
MM; 0.75
H, 200 pF;
JESD22-A114-A
-
200
V
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