參數(shù)資料
型號: MFRC52301HN1
廠商: NXP Semiconductors N.V.
元件分類: 通信及網(wǎng)絡
英文描述: Contactless reader IC
封裝: MFRC52301HN1<SOT617-1 (HVQFN32)|<<http://www.nxp.com/packages/SOT617-1.html<1<Always Pb-free,;MFRC52301HN1<SOT617-1 (HVQFN32)|<<http://www.nxp.com/packages/SOT617-1.html&
文件頁數(shù): 49/98頁
文件大?。?/td> 1666K
代理商: MFRC52301HN1
MFRC523
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
COMPANY PUBLIC
Rev. 3.7 — 8 November 2011
115237
49 of 98
NXP Semiconductors
MFRC523
Contactless reader IC
9.2.2.6
TxASKReg register
Controls transmit modulation settings.
Table 64.
Bit
Symbol
Access
Table 65.
Bit
7
9.2.2.7
TxSelReg register
Selects the internal sources for the analog module.
Table 66.
Bit
Symbol:
Access:
Table 67.
Bit
7 to 6
5 to 4
3
Tx2CW
1
output signal on pin TX2 continuously delivers the unmodulated
13.56 MHz energy carrier
Tx2CW bit is enabled to modulate the 13.56 MHz energy carrier
reserved for future use
output signal on pin TX2 delivers the 13.56 MHz energy carrier
modulated by the transmission data
output signal on pin TX1 delivers the 13.56 MHz energy carrier
modulated by the transmission data
0
-
1
2
1
reserved
Tx2RFEn
0
Tx1RFEn
1
Table 63.
Bit Symbol
TxControlReg register bit descriptions
…continued
Value Description
TxASKReg register (address 15h); reset value: 00h bit allocation
7
6
5
reserved Force100ASK
-
R/W
4
3
2
1
0
reserved
-
TxASKReg register bit descriptions
Symbol
Value
reserved
-
Description
reserved for future use
6
Force100ASK 1
forces 100 % ASK modulation independently of the ModGsPReg
register setting
reserved for future use
5 to 0 reserved
-
TxSelReg register (address 16h); reset value: 10h bit allocation
7
6
5
reserved
DriverSel[1:0]
-
R/W
4
3
2
1
0
MFOutSel[3:0]
R/W
TxSelReg register bit descriptions
Symbol
Value
reserved
-
DriverSel[1:0]
-
00
Description
reserved for future use
selects the input of drivers TX1 and TX2
3-state; in soft power-down the drivers are only in 3-state
mode if the DriverSel[1:0] value is set to 3-state mode
modulation signal (envelope) from the internal encoder, Miller
pulse encoded
modulation signal (envelope) from pin MFIN
HIGH; the HIGH level depends on the setting of bits
InvTx1RFOn/InvTx1RFOff and InvTx2RFOn/InvTx2RFOff
01
10
11
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