參數(shù)資料
型號(hào): MFRC52301HN1
廠商: NXP Semiconductors N.V.
元件分類: 通信及網(wǎng)絡(luò)
英文描述: Contactless reader IC
封裝: MFRC52301HN1<SOT617-1 (HVQFN32)|<<http://www.nxp.com/packages/SOT617-1.html<1<Always Pb-free,;MFRC52301HN1<SOT617-1 (HVQFN32)|<<http://www.nxp.com/packages/SOT617-1.html&
文件頁(yè)數(shù): 90/98頁(yè)
文件大?。?/td> 1666K
代理商: MFRC52301HN1
MFRC523
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
COMPANY PUBLIC
Rev. 3.7 — 8 November 2011
115237
90 of 98
NXP Semiconductors
MFRC523
Contactless reader IC
23. Revision history
Table 161. Revision history
Document ID
MFRC523 v. 3.7 20111108
Modifications:
Release date
Data sheet status
Product data sheet
Change notice
-
Supersedes
MFRC523 v. 3.6
Table 2 “Ordering information”
: updated
Table 154 “Characteristics”
: unit of P
xtal
corrected
MFRC523 v. 3.6 20110628
Modifications:
Section 9.2.1.7 “ErrorReg register” on page 40 added
MFRC523_35
20100924
Modifications:
Table 131 “VersionReg register bit descripitons” on page 63 changed
MFRC523_34
20100715
Product data sheet
Modifications:
Section 9.2.2.10 “DemodReg register”: register updated.
Section 9.2.2.15 “TypeBReg register”: register updated.
Section 9.2.3.10 “TModeReg and TPrescalerReg registers”: register updated.
Section 9.2.4.7 “AutoTestReg register”: register updated.
Section 8.7 “Timer unit”: timer calculation updated.
Section 9.2.4.8 “VersionReg register”: version: B2h updated.
Section 16.1 “Test signals”: selftest result updated.
MFRC523_33
20100305
Product data sheet
Modifications:
Table 106 “TModeReg register bit descriptions” and Table 108
“TPrescalerReg register bit descriptions”: text updated.
Section 8.7 “Timer unit”: input clock frequency changed to 13.56 MHz and
text updated.
Table 154 “SPI timing characteristics”: NSS HIGH time, t
NSSH
added.
MFRC523_32
20100112
Product data sheet
Modifications:
The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP
Semiconductors.
Legal texts have been adapted to the new company name where appropriate.
General re-wording of MIFARE designation and commercial conditions.
Table 106 “TModeReg register bit descriptions” and Table 108 “TPrescalerReg register bit
descriptions”: changed value "f
Timer
= 13.56 MHz / (TPreScaler + 1)".
Graphics: updated to latest standard.
Descriptive text: updated.
Register and bit names: updated.
Register tables: presentation updated.
Parameter symbols: updated.
Section 9 “MFRC523 registers” now follows Section 8 “Functional description”.
Section 16 “Test information” added, incorporating Section 16.1 “Test signals”.
115231
May 2007
Product data sheet
115230
September 2006
Product data sheet
115220
August 2006
Preliminary data sheet
Product data sheet
-
MFRC523_35
Product data sheet
-
MFRC523_34
-
MFRC523_33
-
MFRC523_32
-
115231
-
-
-
115230
115220
-
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