參數(shù)資料
型號: MFRC52301HN1
廠商: NXP Semiconductors N.V.
元件分類: 通信及網(wǎng)絡(luò)
英文描述: Contactless reader IC
封裝: MFRC52301HN1<SOT617-1 (HVQFN32)|<<http://www.nxp.com/packages/SOT617-1.html<1<Always Pb-free,;MFRC52301HN1<SOT617-1 (HVQFN32)|<<http://www.nxp.com/packages/SOT617-1.html&
文件頁數(shù): 51/98頁
文件大?。?/td> 1666K
代理商: MFRC52301HN1
MFRC523
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
COMPANY PUBLIC
Rev. 3.7 — 8 November 2011
115237
51 of 98
NXP Semiconductors
MFRC523
Contactless reader IC
9.2.2.9
RxThresholdReg register
Selects thresholds for the bit decoder.
Table 70.
Bit
Symbol
Access
Table 71.
Bit
7 to 4
9.2.2.10
DemodReg register
Defines demodulator settings.
Table 72.
Bit
Symbol
Table 73.
Bit
7 to 6
RxThresholdReg register (address 18h); reset value: 84h bit allocation
7
6
5
4
MinLevel[3:0]
R/W
3
2
1
0
reserved
-
CollLevel[2:0]
R/W
RxThresholdReg register bit descriptions
Symbol
Description
MinLevel[3:0]
defines the minimum signal strength at the decoder input that will be
accepted. If the signal strength is below this level it is not evaluated
reserved
reserved for future use
CollLevel[2:0]
defines the minimum signal strength at the decoder input that must be
reached by the weaker half-bit of the Manchester encoded signal to
generate a bit-collision relative to the amplitude of the stronger half-bit
3
2 to 0
DemodReg register (address 19h); reset value: 4Dh bit allocation
7
6
5
AddIQ[1:0]
FixIQ
TPrescal
Even
R/W
R/W
4
3
TauRcv[1:0]
2
1
TauSync[1:0]
0
Access
-
R/W
R/W
DemodReg register bit descriptions
Symbol
Value
AddIQ[1:0]
-
Description
defines the use of I-channel and Q-channel during reception
Remark:
the FixIQ bit must be set to logic 0 to enable the
following settings:
selects the stronger channel
selects the stronger channel and freezes the selected channel
during communication
reserved
reserved
if the bits of AddIQ are set to X0, the reception is fixed to
I-channel
if the bits of AddIQ are set to X1, the reception is fixed to
Q-channel
00
01
10
11
1
5
FixIQ
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