參數(shù)資料
型號(hào): MFRC52301HN1
廠商: NXP Semiconductors N.V.
元件分類: 通信及網(wǎng)絡(luò)
英文描述: Contactless reader IC
封裝: MFRC52301HN1<SOT617-1 (HVQFN32)|<<http://www.nxp.com/packages/SOT617-1.html<1<Always Pb-free,;MFRC52301HN1<SOT617-1 (HVQFN32)|<<http://www.nxp.com/packages/SOT617-1.html&
文件頁(yè)數(shù): 60/98頁(yè)
文件大小: 1666K
代理商: MFRC52301HN1
MFRC523
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
COMPANY PUBLIC
Rev. 3.7 — 8 November 2011
115237
60 of 98
NXP Semiconductors
MFRC523
Contactless reader IC
Table 109. TPrescalerReg register bit descriptions
Bit
Symbol
7 to 0
TPrescaler_Lo[7:0] defines the lower 8 bits of the TPrescaler value
the following formula is used to calculate f
Timer
if TPrescalEven bit in
Demot Reg is set to logic 0:
f
Timer
= 13.56 MHz / (2 * TPreScaler + 1)
where TPreScaler = [TPrescaler_Hi:TPrescaler_Lo] (TPrescaler
value on 12 bits). The default TPrescalEven is logic 0;
f
Timer
= 13.56 MHz / (2 * TPreScaler + 2); see
Section 8.7 “Timer
unit”
9.2.3.11
TReloadReg register
Defines the 16-bit timer reload value.
Remark:
The reload value bits are contained in two 8-bit registers.
Table 110. TReloadReg (higher bits) register (address 2Ch); reset value: 00h bit allocation
Bit
7
6
5
4
Symbol
TReloadVal_Hi[7:0]
Access
Table 111. TReloadReg register higher bit descriptions
Bit
Symbol
7 to 0
TReloadVal_Hi[7:0]
Table 112. TReloadReg (lower bits) register (address 2Dh); reset value: 00h bit allocation
Bit
7
6
5
Symbol
TReloadVal_Lo[7:0]
Access
Table 113. TReloadReg register lower bit descriptions
Bit
Symbol
7 to 0
TReloadVal_Lo[7:0]
9.2.3.12
TCounterValReg register
Contains the timer value.
Remark:
The timer value bits are contained in two 8-bit registers.
Table 114. TCounterValReg (higher bits) register (address 2Eh); reset value: xxh bit
allocation
Bit
7
6
5
Symbol
TCounterVal_Hi[7:0]
Access
Description
3
2
1
0
R/W
Description
defines the higher 8 bits of the 16-bit timer reload value. On a
start event, the timer loads the timer reload value. Changing
this register affects the timer only at the next start event
4
3
2
1
0
R/W
Description
defines the lower 8 bits of the 16-bit timer reload value. On a
start event, the timer loads the timer reload value. Changing this
register affects the timer only at the next start event
4
3
2
1
0
R
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