參數(shù)資料
型號: MFRC52301HN1
廠商: NXP Semiconductors N.V.
元件分類: 通信及網(wǎng)絡(luò)
英文描述: Contactless reader IC
封裝: MFRC52301HN1<SOT617-1 (HVQFN32)|<<http://www.nxp.com/packages/SOT617-1.html<1<Always Pb-free,;MFRC52301HN1<SOT617-1 (HVQFN32)|<<http://www.nxp.com/packages/SOT617-1.html&
文件頁數(shù): 16/98頁
文件大小: 1666K
代理商: MFRC52301HN1
MFRC523
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
COMPANY PUBLIC
Rev. 3.7 — 8 November 2011
115237
16 of 98
NXP Semiconductors
MFRC523
Contactless reader IC
The address byte must meet the following formats:
the MSB of the first byte sets the mode used
the MSB is set to logic 0 to write data to the MFRC523
the MSB is set to logic 1 to read data from the MFRC523
bit 6 is reserved for future use
bits [5:0] define the address; see
Table 15
Table 15.
Bit 7
(MSB)
1 or 0
8.3.4
I
2
C Bus Interface
An I
2
C-bus interface is supported and enables implementation of a low-cost, low pin count
serial bus interface to the host. The I
2
C-bus interface is implemented based on
NXP Semiconductors’
I
2
C-bus interface specification, rev. 2.1, January 2000
. The
interface can only act in slave mode. Therefore the MFRC523 does not perform clock
generation or access arbitration.
The MFRC523 can act as a slave receiver or slave transmitter in Standard mode, Fast
mode and High-speed mode.
SDA is a bidirectional line connected to a positive supply voltage using a current source or
a pull-up resistor. Both SDA and SCL lines are set HIGH when data is not transmitted. The
MFRC523 has a 3-state output stage to perform the wired-AND function. Data on the
I
2
C-bus can be transferred at data rates of up to 100 kBd in Standard mode, up to
400 kBd in Fast mode or up to 3.4 Mbit/s in High-speed mode.
If the I
2
C-bus interface is selected, spike suppression is activated on lines SCL and SDA
as defined in the I
2
C-bus interface specification.
See
Table 156 on page 77
for timing requirements.
Address byte 0 register; address MOSI
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
(LSB)
address
reserved
address
address
address
address
address
Fig 11. I
2
C-bus interface
001aal160
MFRC523
SDA
SCL
I2C
EA
ADR_[5:0]
PULL-UP
NETWORK
CONFIGURATION
WIRING
PULL-UP
NETWORK
MICROCONTROLLER
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