參數(shù)資料
型號: MFRC52301HN1
廠商: NXP Semiconductors N.V.
元件分類: 通信及網(wǎng)絡(luò)
英文描述: Contactless reader IC
封裝: MFRC52301HN1<SOT617-1 (HVQFN32)|<<http://www.nxp.com/packages/SOT617-1.html<1<Always Pb-free,;MFRC52301HN1<SOT617-1 (HVQFN32)|<<http://www.nxp.com/packages/SOT617-1.html&
文件頁數(shù): 12/98頁
文件大小: 1666K
代理商: MFRC52301HN1
MFRC523
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
COMPANY PUBLIC
Rev. 3.7 — 8 November 2011
115237
12 of 98
NXP Semiconductors
MFRC523
Contactless reader IC
The write address byte must meet the following criteria:
the MSB of the first byte sets the mode. To write data to the MFRC523, the MSB is set
to logic 0; see
Table 9
bits [6:1] define the address
the LSB should be set to logic 0
Table 9.
Address line
(MOSI)
byte 0
8.3.3
UART interface
8.3.3.1
Connection to a host
Remark:
Signals DTRQ and MX can be disabled by clearing TestPinEnReg register’s
RS232LineEn bit.
8.3.3.2
Selectable UART transfer speeds
The internal UART interface is compatible with the RS232 serial interface.
The default transfer speed is 9.6 kBd. To change the transfer speed, the host controller
must write a value for the new transfer speed to the SerialSpeedReg register. Bits
BR_T0[2:0] and BR_T1[4:0] define the factors for setting the transfer speed in the
SerialSpeedReg register.
The BR_T0[2:0] and BR_T1[4:0] settings are described in
Table 10
. Examples of different
transfer speeds and the relevant register settings are given in
Table 11
.
Table 10.
BR_Tn
BR_T0 factor
BR_T1 range
SPI write address
Bit 7
(MSB)
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
(LSB)
0
0
address
address
address
address
address
address
Fig 8.
UART connection to microcontrollers
001aal158
MFRC523
RX
RX
TX
TX
DTRQ
DTRQ
MX
MX
BR_T0 and BR_T1 settings
Bit 0
1
1 to 32
Bit 1
1
33 to 64
Bit 2
2
33 to 64
Bit 3
4
33 to 64
Bit 4
8
33 to 64
Bit 5
16
33 to 64
Bit 6
32
33 to 64
Bit 7
64
33 to 64
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