參數(shù)資料
型號： MK68564
廠商： 意法半導體
英文描述： Serial Input Output(串行I/O(雙通道,多功能外圍電路))
中文描述： 串行輸入輸出（串行的I / O（雙通道，多功能外圍電路））
文件頁數(shù)： 13/46頁
文件大?。?/td> 464K
代理商： MK68564
Forexample, whenthetime constant register is loa-
ded with ”01H” and divide by four is selected, one
output clockwill occur for every four input clocks. If
the time constant value loaded is ”00H” (256 deci-
mal) instead of ”01H” and divideby 64 is selected,
one output clock will occur for every 16384 input
clocks. Notethat the minimum count value is ”01H”
(1 decimal), and the maximum count valueis ”00H”
(256 decimal).
The output of the baud rate generator may be pro-
grammed to drive the transmitter (BRG output on
TxC),the receiver(BRG output onRxC),both (BRG
output on TxC and RxC), or neither(TxC and RxC
are inputs). After a reset, the baud rate generator is
disabled, divide by four is selected, and TxC and
RxC are inputs.
The baudrate generator should be disabled before
the CPUwrites to the time constant register. Thisis
necessary because no attempt was made to syn-
chronize the loading of anewtimeconstant with the
clock used to drive the BRG.
Figure 8 indicates the externalcomponents needed
to connect a crystal oscillator to the SIO XTAL in-
puts.Theallowed crystalparameters arealsolisted.
For a 3.6864MHz input signal to the baud rate ge-
nerator,thetimeconstants, listed in table 2, are loa-
ded to obtain the desired baud rates (in x1 clock
mode).
Figure 8 :
SIO External OscillatorComponents.
Table 2 :
Time-Constant Values.
Rate
19200
9600
7200
4800
3600
2400
2000
1800
1200
600
300
Time Constant
48
96
128
192
256
24
29
32
48
96
192
Divide By
4
4
4
4
4
64
64
64
64
64
64
Error
69 %
CRYSTAL PARAMETERS :
ParallelResonance,FundamentalMode AT Cut
Rs a 150
(Fr = 2.8- 5.0MHz)
Rs a 300
(Fr = 2.0- 2.7MHz)
CI = 18pf; Cm =0.02pF ; Ch= 5pF ; Lm = 96MHz
Fr (typ) = 2.457MHz
ASYNCHRONOUS OPERATION
INTRODUCTION
Manytypes ofAsynchronous operations are perfor-
med by the MK68564 SIO. Figure 9 represents aty-
pical Asynchronous message format and some of
the options available on the SIO. The transmit pro-
cessinserts start,stop, and parity bits to a variable
data format and supplies a serial data streamto the
Transmit Data output (TxD). The receiver takes the
data from the Receive Data input (RxD) and strips
awayexpected start and stopbits at a programmed
clockrate. Itprovides error checking foroverrun, pa-
rity, and carrier-loss errors, and, if desired, provides
interrupts for these conditions.
To set up the SIO for Asynchronous operation, the
following registers need to be initialized : Mode
ControlRegister, Interrupt Control Register, Recei-
ver Control Register, and Transmitter Control
Register. The Mode Control Register must be
programmed before the other registers to assure
proper operation of the SIO. The following registers
are used to transfer data or to communicate status
between the SIO and the CPU or other bus master
when
operating
in
Asynchronous
Command Register, Status Register 0, Status Re-
gister 1, Data Register, and theVector Register.
modes
:
MK68564
13/46
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