
PEB 2255
FALC-LH V1.3
List of Figures
Page
Data Sheet
1
4
2000-07
Figure
4
3
Figure
44
Figure
4
5
Figure
4
6
Figure
4
7
Figure
48
Figure
49
Figure 50
Figure 51
Figure 52
Figure 53
Figure 5
4
Figure 55
Figure 56
Figure 57
Figure 5
8
Figure 5
9
Figure 60
Figure 61
Figure 62
Figure 63
Figure 6
4
Figure 65
Figure 66
Figure 67
Figure 6
8
Figure 6
9
Figure 70
Figure 71
Figure 72
Figure 73
Figure 7
4
Figure 75
Figure 76
Figure 77
Figure 7
8
Figure 7
9
Figure
8
0
Figure
8
1
Figure
8
2
Figure
8
3
Figure
84
Transmit System Interface Clocking:
8
MHz/
4
Mbit/s (T1/J1) . . . . . . 125
2.0
48
Mbit/s Transmit Signaling Clocking (T1/J1) . . . . . . . . . . . . . . . 126
1.5
44
Mbit/s Transmit Signaling Highway (T1/J1) . . . . . . . . . . . . . . . 126
Signaling Marker for CAS/CAS-CC Applications (T1/J1). . . . . . . . . . 127
Signaling Marker for CAS-BR Applications (T1/J1) . . . . . . . . . . . . . . 12
8
Transmit FS/DL Bits on
X
DI (T1/J1) . . . . . . . . . . . . . . . . . . . . . . . . . 12
9
Transmitter Configuration (T1/J1) . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
4
Transmit Line Monitor Configuration (T1/J1) . . . . . . . . . . . . . . . . . . . 136
Influences on Synchronization Status (T1/J1) . . . . . . . . . . . . . . . . . . 13
9
Remote Loop (T1/J1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 153
Payload Loop (T1/J1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
4
Local Loop (T1/J1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 155
Channel Loopback (T1/J1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 156
HDLC Receive Data Flow of FALC-LH . . . . . . . . . . . . . . . . . . . . . . 170
HDLC Transmit Data Flow of FALC-LH . . . . . . . . . . . . . . . . . . . . . 171
Interrupt Driven Data Transmission (flow diagram) . . . . . . . . . . . . . . 17
4
Interrupt Driven Transmission Example. . . . . . . . . . . . . . . . . . . . . . . 175
Interrupt Driven Reception Sequence Example. . . . . . . . . . . . . . . . . 175
Crystal Oscillator Circuit (master/slave mode). . . . . . . . . . . . . . . . . . 33
9
External Oscillator Circuit (master mode) . . . . . . . . . . . . . . . . . . . . . 33
9
X
TAL External Clock Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
9
External Pullable Crystal Tuning Range . . . . . . . . . . . . . . . . . . . . . . 3
4
0
JTAG Boundary Scan Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
4
1
Reset Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
4
2
Intel Non-Multiplexed Address Timing . . . . . . . . . . . . . . . . . . . . . . . . 3
4
2
Intel Multiplexed Address Timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
4
3
Intel Read Cycle Timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
4
3
Intel Write Cycle Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
44
Motorola Read Cycle Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
4
5
Motorola Write Cycle Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
4
6
Timing of Dual Rail Optical Interface . . . . . . . . . . . . . . . . . . . . . . . . . 3
4
7
Receive Clock and RFSP/FREE
Z
S Timing . . . . . . . . . . . . . . . . . . . . 3
48
System Interface Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 350
X
MFS Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 351
X
MFS Timing (cont’d.) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 351
System Clock Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 353
Pulse Shape at Transmitter Output for E1 Applications. . . . . . . . . . . 355
T1 Pulse Shape . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 356
Thermal Behavior of Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
8
Input/Output Waveforms for AC Testing . . . . . . . . . . . . . . . . . . . . . . 35
9
Protection Circuitry. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 361
External Line Frontend Calculator . . . . . . . . . . . . . . . . . . . . . . . . . . . 363