
PSB 7280
Semiconductor Group
71
Data Sheet 1998-07-01
For closing a frame in HDLC mode the DSP/host has two possibilities:
1. When XME and XF bits are set in the same command, all remaining bytes in the FIFO
are transmitted, the CRC field (programmable) and the closing flag of the HDLC frame
are appended and after all data has been transmitted to the line the HDLC controller
generates a new XPR interrupt. Thus, a delay is caused between the transmission of
two frames which is filled with interframe timefill values (programmable flags or ‘1’s).
2. To avoid the gap between two frames and time-optimize the transmission, the XF
command can be set first for the last FIFO of the frame. After the corresponding XPR
interrupt has been detected, the DSP/host may set XME = 1 and then start writing the
next frame for the XFIFO (max. 32 bytes) which is again transmitted by an XF
command. The HDLC transmitter will automatically insert the CRC field
(programmable), the closing flag for the first frame and the start flag for the second
frame.
Figure 28
The host does not necessarily have to transfer a frame in blocks of 32 bytes. As a matter
of fact, the sub-blocks issued by the host and separated by an XF command, can be
between 0 and 32 bytes long.
If the transmit FIFO runs out of data and the XME command bit has not been set, the
frame is terminated with an abort sequence (seven ‘1’s) followed by inter-frame time fill,
and the host will be advised by a Transmit Data Unterrun (XDU) interrupt status.