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8.17.2 TCP2 Peripheral Register Description(s)
TMS320TCI6482
Communications Infrastructure Digital Signal Processor
SPRS246F–APRIL 2005–REVISED MAY 2007
Table 8-97. TCP2 Registers
EDMA BUS
CONFIGURATION BUS
HEX ADDRESS RANGE
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
02BA 0000
02BA 004C
02BA 0050
02BA 0060
02BA 0068
02BA 0070
02BA 005C - 02BB FFFF
ACRONYM
REGISTER NAME
HEX ADDRESS RANGE
5000 0000
5000 0004
5000 0008
5000 000C
5000 0010
5000 0014
5000 0018
5000 001C
5000 0020
5000 0024
5000 0028
5000 002C
5000 0030
5000 0034
5000 0038
5000 003C
5000 0040
5000 0044
5000 0048
5001 0000
5003 0000
5004 0000
5005 0000
5006 0000
5007 0000
5008 0000
5009 0000
500A 0000
500B 0000
TCPIC0
TCPIC1
TCPIC2
TCPIC3
TCPIC4
TCPIC5
TCPIC6
TCPIC7
TCPIC8
TCPIC9
TCPIC10
TCPIC11
TCPIC12
TCPIC13
TCPIC14
TCPIC15
TCPOUT0
TCPOUT1
TCPOUTP2
X0
W0
W1
I0
O0
S0
T0
C0
B0
A0
TCPPID
TCPEXE
TCPEND
TCPERR
TCPSTAT
TCPEMU
-
TCP2 Input Configuration Register 0
TCP2 Input Configuration Register 1
TCP2 Input Configuration Register 2
TCP2 Input Configuration Register 3
TCP2 Input Configuration Register 4
TCP2 Input Configuration Register 5
TCP2 Input Configuration Register 6
TCP2 Input Configuration Register 7
TCP2 Input Configuration Register 8
TCP2 Input Configuration Register 9
TCP2 Input Configuration Register 10
TCP2 Input Configuration Register 11
TCP2 Input Configuration Register 12
TCP2 Input Configuration Register 13
TCP2 Input Configuration Register 14
TCP2 Input Configuration Register 15
TCP2 Output Parameters Register 0
TCP2 Output Parameters Register 1
TCP2 Output Parameters Register 2
TCP2 Data/Sys and Parity Memory
TCP2 Extrinsic Mem 0
TCP2 Extrinsic Mem 1
TCP2 Interleaver Memory
TCP2 Output/Decision Memory
TCP2 Scratch Pad Memory
TCP2 Beta State Memory
TCP2 CRC Memory
TCP2 Beta Prolog Memory
TCP2 Alpha Prolog Memory
TCP2 Peripheral Identification Register
TCP2 Execute Register
TCP2 Endianness Register
TCP2 Error Register
TCP2 Status Register
TCP2 Emulation Register
Reserved
N/A
N/A
N/A
N/A
N/A
N/A
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C64x+ Peripheral Information and Electrical Specifications
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