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TMS320TCI6482
Communications Infrastructure Digital Signal Processor
SPRS246F–APRIL 2005–REVISED MAY 2007
Table 3-9. Peripheral Status Register 0 (PERSTAT0) Field Descriptions (continued)
Bit
20:18
Field
I2CSTAT
Value
Description
I2C status
I2C is in the disabled state
I2C is in the enabled state
I2C is in the static powerdown state
I2C is in the disable in progress state
I2C is in the enable in progress state
Reserved
GPIO status
GPIO is in the disabled state
GPIO is in the enabled state
GPIO is in the static powerdown state
GPIO is in the disable in progress state
GPIO is in the enable in progress state
Reserved
Timer1 status
Timer1 is in the disabled state
Timer1 is in the enabled state
Timer1 is in the static powerdown state
Timer1 is in the disable in progress state
Timer1 is in the enable in progress state
Reserved
Timer0 status
Timer0 is in the disabled state
Timer0 is in the enabled state
Timer0 is in the static powerdown state
Timer0 is in the disable in progress state
Timer0 is in the enable in progress state
Reserved
EMAC/MDIO status
EMAC/MDIO is in the disabled state
EMAC/MDIO is in the enabled state
EMAC/MDIO is in the static powerdown state
EMAC/MDIO is in the disable in progress state
EMAC/MDIO is in the enable in progress state
Reserved
VCP status
VCP is in the disabled state
VCP is in the enabled state
VCP is in the static powerdown state
VCP is in the disable in progress state
VCP is in the enable in progress state
Reserved
000
001
011
100
101
Others
17:15
GPIOSTAT
000
001
011
100
101
Others
14:12
TIMER1STAT
000
001
011
100
101
Others
11:9
TIMER0STAT
000
001
011
100
101
Others
8:6
EMACSTAT
000
001
011
100
101
Others
5:3
VCPSTAT
000
001
011
100
101
Others
Device Configuration
66
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