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參數(shù)資料
| 型號(hào)： | TMX320TCI6482ZTZA8 |
| 廠商： | Texas Instruments, Inc. |
| 元件分類： | 數(shù)字信號(hào)處理 |
| 英文描述： | Communications Infrastructure Digital Signal Processor |
| 中文描述： | 通信基礎(chǔ)設(shè)施的數(shù)字信號(hào)處理器 |
| 文件頁(yè)數(shù)： | 56/255頁(yè) |
| 文件大?。?/td> | 1893K |
| 代理商： | TMX320TCI6482ZTZA8 |
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3.2 Peripheral Configuration at Device Reset
TMS320TCI6482
Communications Infrastructure Digital Signal Processor
SPRS246F–APRIL 2005–REVISED MAY 2007
Table 3-1. TCI6482 Device Configuration Pins (AEA[19:0], ABA[1:0], and PCI_EN) (continued)
CONFIGURATION
PIN
IPD/
IPU
(1)
NO.
FUNCTIONAL DESCRIPTION
PCI Frequency Selection (PCI66).
Selects the operating frequency of the PCI (either 33 MHz or 66 MHz).
0
PCI operates at 33 MHz (default)
1
PCI operates at 66 MHz
Note:
If the PCI pin function is disabled (PCI_EN pin = 0), this pin must
not
be pulled up.
McBSP1 pin function enable bit (MCBSP1_EN).
Selects which function is enabled on the McBSP1/GPIO multiplexed pins when the VLYNQ
function is disabled (VLYNQ_EN pin = 0).
0
GPIO pin function enabled (default).
This means all multiplexed McBSP1/GPIO pins function as GPIO pins.
1
McBSP1 pin function enabled.
This means all multiplexed McBSP1/GPIO pins function as McBSP1 pins.
SYSCLKOUT Enable bit (SYSCLKOUT_EN).
Selects which function is enabled on the SYSCLK4/GP[1] muxed pin.
0
GP[1] pin function is enabled (default)
1
SYSCLK4 pin function is enabled
For proper TCI6482 device operation, the AEA3 pin must be pulled up at device reset using
a 1-k
resistor if power is applied to the SRIO supply pins. If the SRIO peripheral is not
used and the SRIO supply pins are connected to V
SS
, the AEA3 pin must be pulled down to
V
SS
using a 1-k
resistor.
Configuration General-Purpose Inputs (CFGGP[2:0])
The value of these pins is latched to the Device Status Register following device reset and is
used by the on-chip bootloader for some boot modes. For more information on the boot
modes, see
Section 2.4
,
Boot Sequence
.
PCI pin function enable bit (PCI_EN).
Selects which function is enabled on the HPI/PCI and the PCI/UTOPIA multiplexed pins.
0
HPI and UTOPIA pin function enabled (default)
This means all multiplexed HPI/PCI and PCI/UTOPIA pins function as HPI and
UTOPIA pins, respectively.
1
PCI pin function enabled
This means all multiplexed HPI/PCI and PCI/UTOPIA pins function as PCI pins.
DDR2 Memory Controller enable (DDR2_EN).
0
DDR2 Memory Controller peripheral pins are disabled (default)
1
DDR2 Memory Controller peripheral pins are enabled
EMIFA enable (EMIFA_EN).
0
EMIFA peripheral pins are disabled (default)
1
EMIFA peripheral pins are enabled
AEA6
U27
IPD
AEA5
U28
IPD
AEA4
T28
IPD
AEA3
T27
IPD
[T26,
U26,
U25]
AEA[2:0]
IPD
PCI_EN
Y29
IPD
ABA0
V26
IPD
ABA1
V25
IPD
Some TCI6482 peripherals share the same pins (internally multiplexed) and are mutually exclusive.
Therefore, not all peripherals may be used at the same time. The device configuration pins described in
Section 3.1
,
Device Configuration at Device Reset
, determine which function is enabled for the multiplexed
pins.
Note that when the pin function of a peripheral is disabled at device reset, the peripheral is permanently
disabled and cannot be enabled until its pin function is enabled and another device reset is executed.
Also, note that enabling the pin function of a peripheral does not enable the corresponding peripheral. All
peripherals on the TCI6482 device are disabled by default, except when used for boot, and must be
enabled through software before being used.
Other peripheral options like PCI clock speed and EMAC/MDIO interface mode can also be selected at
device reset through the device configuration pins. The configuration selected is also fixed at device reset
and cannot be changed until another device reset is executed with a different configuration selected.
Device Configuration
56
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