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TMS320TCI6482
Communications Infrastructure Digital Signal Processor
SPRS246F–APRIL 2005–REVISED MAY 2007
Table 3-7. Peripheral Configuration Register 0 (PERCFG0) Field Descriptions (continued)
Bit
22
Field
UTOPIACTL
Value
Description
Mode control for UTOPIA
Set UTOPIA to disabled mode
Set UTOPIA to enabled mode
Reserved.
Mode control for PCI. This bit defaults to 1 when host boot is used (BOOTMODE[3:0] = 0111b).
Set PCI to disabled mode
Set PCI to enabled mode
Reserved.
Mode control for HPI. This bit defaults to 1 when host boot is used (BOOTMODE[3:0] = 0001b).
Set HPI to disabled mode
Set HPI to enabled mode
Reserved.
Mode control for McBSP1
Set McBSP1 to disabled mode
Set McBSP1 to enabled mode
Reserved.
Mode control for McBSP0
Set McBSP0 to disabled mode
Set McBSP0 to enabled mode
Reserved.
Mode control for I2C
Set I2C to disabled mode
Set I2C to enabled mode
Reserved.
Mode control for GPIO
Set GPIO to disabled mode
Set GPIO to enabled mode
Reserved.
Mode control for Timer 1
Set Timer 1 to disabled mode
Set Timer 1 to enabled mode
Reserved.
Mode control for Timer 0
Set Timer 0 to disabled mode
Set Timer 0 to enabled mode
Reserved.
Mode control for EMAC/MDIO
Set EMAC/MDIO to disabled mode
Set EMAC/MDIO to enabled mode
Reserved.
Mode control for VCP
Set VCP to disabled mode
Set VCP to enabled mode
Reserved.
Mode control for TCP
Set TCP to disabled mode
Set TCP to enabled mode
0
1
21
20
Reserved
PCICTL
0
1
19
18
Reserved
HPICTL
0
1
1
17
16
Reserved
McBSP1CTL
0
1
15
14
Reserved
McBSP0CTL
0
1
13
12
Reserved
I2CCTL
0
1
11
10
Reserved
GPIOCTL
0
1
9
8
Reserved
TIMER1CTL
0
1
7
6
Reserved
TIMER0CTL
0
1
5
4
Reserved
EMACCTL
0
1
3
2
Reserved
VCPCTL
0
1
1
0
Reserved
TCPCTL
0
1
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Device Configuration
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