參數(shù)資料
型號: uPSD3233
廠商: 意法半導(dǎo)體
英文描述: Flash Programmable System Device with 8032 Microcontroller Core(嵌入高速“8032微控制器核”的Flash型可編程系統(tǒng)器)
中文描述: 閃存可編程系統(tǒng)器件與8032微控制器內(nèi)核(嵌入高速“8032微控制器核”的閃存型可編程系統(tǒng)器)
文件頁數(shù): 139/164頁
文件大小: 1133K
代理商: UPSD3233
139/164
μ
PSD3200 FAMILY
DRAFT(Thursday 20 June 2002, 13:15).
Note: 1. I
PD
(power down mode) is measured with:
XTAL1=V
SS
; XTAL2=not connected; RESET=V
CC
; Port 0 =V
CC
; all other pins are disconnected. PLD not in Turbo mode.
2. I
CC_CPU
(active mode) is measured with:
XTAL1 driven with t
CLCH
, t
CHCL
= 5ns, V
IL
= VSS+0.5V, V
IH
= Vcc – 0.5V, XTAL2 = not connected; RESET=V
SS
; Port 0=V
CC
; all
other pins are disconnected. I
CC
would be slightly higher if a crystal oscillator is used ( approximately 1mA).
3. I
CC_CPU
(idle mode) is measured with:
XTAL1 driven with t
CLCH
, t
CHCL
= 5ns, V
IL
= V
SS
+0.5V, V
IH
= V
CC
– 0.5V, XTAL2 = not connected; Port 0 = V
CC
;
RESET=V
CC
; all other pins are disconnected.
4. PLD is in non-turbo mode and none of the inputs are switching.
5. See Figure 69 for the PLD current calculation.
6. I/O current = 0 mA, all I/O pins are disconnected.
I
STBY
SRAM (PSD) Stand-by Current
(VSTBY input)
V
CC
= 0V
0.5
1
μ
A
I
IDLE
SRAM (PSD) Idle Current
(VSTBY input)
V
CC
> V
STBY
–0.1
0.1
μ
A
I
RST
Reset Pin Pull-up Current
(RESET)
V
IN
= V
SS
–10
–55
μ
A
I
FR
XTAL Feedback Resistor
Current (XTAL1)
XTAL1 = V
CC
XTAL2 = V
SS
–20
–50
μ
A
I
LI
Input Leakage Current
V
SS
< V
IN
< V
CC
–1
1
μ
A
I
LO
Output Leakage Current
0.45 < V
OUT
< V
CC
–10
10
μ
A
I
PD1
Power-down Mode
V
CC
= 5.5V
LVD logic disabled
250
μ
A
LVD logic enabled
380
μ
A
I
CC_CPU2,3,6
Active (12 MHz)
V
CC
= 5V
20
30
mA
Idle (12 MHz)
8
10
mA
Active (24 MHz)
V
CC
= 5V
30
38
mA
Idle (24 MHz)
15
20
mA
Active (40 MHz)
V
CC
= 5V
40
62
mA
Idle (40 MHz)
20
30
mA
I
CC_PSD
(DC)
6
Operating
Supply Current
PLD Only
PLD_TURBO = Off,
f = 0 MHz
7
0
μ
A/PT
5
PLD_TURBO = On,
f = 0 MHz
400
700
μ
A/PT
Flash
memory
During Flash memory
Write/Erase Only
15
30
mA
Read Only,f = 0 MHz
0
0
mA
SRAM
f = 0 MHz
0
0
mA
I
CC_PSD
(AC)
6
PLD AC Base
note
5
Flash memory AC Adder
2.5
3.5
mA/
MHz
SRAM AC Adder
1.5
3.0
mA/
MHz
Symbol
Parameter
Test Condition
(in addition to those
in Table 108)
Min.
Typ.
Max.
Unit
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