參數(shù)資料
型號(hào)： uPSD3233
廠商： 意法半導(dǎo)體
英文描述： Flash Programmable System Device with 8032 Microcontroller Core(嵌入高速“8032微控制器核”的Flash型可編程系統(tǒng)器)
中文描述： 閃存可編程系統(tǒng)器件與8032微控制器內(nèi)核（嵌入高速“8032微控制器核”的閃存型可編程系統(tǒng)器）
文件頁數(shù)： 99/164頁
文件大?。?/td> 1133K
代理商： UPSD3233
99/164
μ
PSD3200 FAMILY
DRAFT(Thursday 20 June 2002, 13:15).
the embedded algorithm. See the section entitled
“Programming Flash Memory”, on page 100, for
details.
Table 84. Status Bit
Note: 1. X = Not guaranteed value, can be read either 1 or 0.
2. DQ7-DQ0 represent the Data Bus bits, D7-D0.
3. FS0-FS7 and CSBOOT0-CSBOOT3 are active High.
Data Polling Flag (DQ7).
When erasing or pro-
gramming in Flash memory, the Data Polling Flag
(DQ7) bit outputs the complement of the bit being
entered for programming/writing on the DQ7 bit.
Once the Program instruction or the Write opera-
tion is completed, the true logic value is read on
the Data Polling Flag (DQ7) bit (in a Read opera-
tion).
I
Data Polling is effective after the fourth Write
pulse (for a Program instruction) or after the
sixth Write pulse (for an Erase instruction). It
must be performed at the address being
programmed or at an address within the Flash
memory sector being erased.
I
During an Erase cycle, the Data Polling Flag
(DQ7) bit outputs a 0. After completion of the
cycle, the Data Polling Flag (DQ7) bit outputs
the last bit programmed(it is a 1 after erasing).
I
If the byte to be programmed is in a protected
Flash memory sector, the instruction is ignored.
I
Ifall theFlash memory sectors to be erased are
protected, the Data Polling Flag (DQ7) bit is
reset to 0 for about 100
μ
s, and then returns to
the previous addressed byte. No erasure is
performed.
Toggle Flag (DQ6).
The Flash memory offers an-
other way for determining when theProgram cycle
is completed. During the internal Write operation
and when either the FS0-FS7 or CSBOOT0-
CSBOOT3 is true, the Toggle Flag (DQ6) bit tog-
gles from 0 to 1 and 1 to 0 on subsequentattempts
to read any byte of the memory.
When the internal cycle is complete, the toggling
stops and thedata read on the Data Bus D0-D7 is
the addressed memory byte. The device is now
accessible for a new Read or Write operation. The
cycle is finished when two successive Reads yield
the same output data.
I
The Toggle Flag (DQ6) bit is effective after the
fourth Write pulse (for a Program instruction) or
after the sixth Write pulse (for an Erase
instruction).
I
If the byte to be programmed belongs to a
protected Flash memory sector, the instruction
is ignored.
I
If all the Flash memory sectors selected for
erasure areprotected,theToggle Flag(DQ6)bit
toggles to 0 for about 100
μ
sand then returnsto
the previous addressed byte.
Error Flag (DQ5).
During a normal Program or
Erase cycle, the Error Flag (DQ5) bit is to 0. This
bit is set to 1 when there is a failure during Flash
memory Byte Program, Sector Erase, or Bulk
Erase cycle.
In thecase of Flash memory programming, theEr-
ror Flag (DQ5)bit indicates theattempt to program
a Flashmemory bit from the programmed state, 0,
to the erased state, 1, which is not valid. The Error
Flag (DQ5)bit may also indicate a Time-out condi-
tion while attempting to program a byte.
In caseof an error ina Flashmemory Sector Erase
or ByteProgram cycle, the Flash memory sector in
which the error occurred or to which the pro-
grammed byte belongs must no longer be used.
Other Flash memory sectors may still be used.
The Error Flag (DQ5) bit is reset after a Reset
Flash instruction.
Erase Time-out Flag (DQ3).
The Erase
out Flag (DQ3) bit reflects the time-out period al-
lowed between two consecutive Sector Erase in-
structions. The Erase Time-out Flag (DQ3) bit is
reset to 0 after a Sector Erase cycle for a time pe-
riod of 100
μ
s + 20% unless an additional Sector
Erase instruction is decoded. After this time peri-
od, or when the additional Sector Erase instruction
is decoded, the Erase Time-out Flag (DQ3) bit is
set to 1.
Time-
Functional Block
FS0-FS7/CSBOOT0-
CSBOOT3
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
Flash Memory
V
IH
Data
Polling
Toggle
Flag
Error
Flag
X
Erase
Time-
out
X
X
X
相關(guān)PDF資料
PDF描述
uPSD3234(中文) Flash Programmable System Device with 8032 Microcontroller Core(嵌入高速“8032微控制器核”的Flash型可編程系統(tǒng)器)
uPSD3212C(中文) Flash Programmable System Devices with 8032 Microcontroller Core and 16Kbit SRAM(帶8032微控制器內(nèi)核和16Kbit SRAM的FLASH可編程系統(tǒng)器件)
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UPSD3234A Flash Programmable System Devices with 8032 Microcontroller Core
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
UPSD3233A-24T1 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash Programmable System Device with 8032 Microcontroller Core
UPSD3233A-24T1T 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash Programmable System Devices with 8032 Microcontroller Core
UPSD3233A-24T6 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash Programmable System Device with 8032 Microcontroller Core
UPSD3233A-24T6T 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash Programmable System Devices with 8032 Microcontroller Core
UPSD3233A-24U1 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash Programmable System Device with 8032 Microcontroller Core
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