參數(shù)資料
型號: uPSD3233
廠商: 意法半導(dǎo)體
英文描述: Flash Programmable System Device with 8032 Microcontroller Core(嵌入高速“8032微控制器核”的Flash型可編程系統(tǒng)器)
中文描述: 閃存可編程系統(tǒng)器件與8032微控制器內(nèi)核(嵌入高速“8032微控制器核”的閃存型可編程系統(tǒng)器)
文件頁數(shù): 21/164頁
文件大小: 1133K
代理商: UPSD3233
21/164
μ
PSD3200 FAMILY
DRAFT(Thursday 20 June 2002, 13:15).
Table 10. Data Transfer Instruction that Access External Data Memory Space
External RAM.
Table 10 shows a list of the Data
Transfer instructions that access external Data
Memory. Only indirect addressing can be used.
The choice is whether to use a one-byte address,
@Ri, where Ri can be either R0 or R1 of the se-
lected registerbank, or a two-byte address, @DT-
PR. The disadvantage to using 16 bit addresses if
only a few K bytes of external RAM are involved is
that 16 bit addresses use all 8 bits of Port 2 as ad-
dress bus. On the other hand, 8 bit address allow
one to address a few K bytes of RAM withouthav-
ing to sacrifice all of Port 2.
Note that in all external Data RAM accesses, the
Accumulator is always either the destination or
source of the data.
Table 11. Data Transfer Instructions that
Access Internal () Data Memory Space
Lookup Tables.
Table 11 shows the two instruc-
tions that are available for reading lookup tables in
Program Memory. Sincethese instructionsaccess
only Program Memory, the lookup tables can only
be read, not updated.
The mnemonic is MOVC for “move constant.” The
first MOVC instruction in Table 11 can accommo-
date a table of up to 256 entries numbered 0
through 255. The number of the desired entry is
loaded into the Accumulator, and the Data Pointer
is set up to point to the beginning of the table.
Then:
MOVC A, @A+DPTR
copies the desired table entry into the Accumula-
tor.
The other MOVC instruction works the same way,
except the Program Counter (PC) is used as the
table base, and the table is accessed through a
subroutine. First the number of the desired en-try
is loaded into the Accumulator, and the subroutine
is called:
MOV A , ENTRY NUMBER
CALL TABLE
The subroutine “TABLE” would look like this:
TABLE: MOVC A , @A+PC
RET
The table itself immediately follows the RET (re-
turn) instruction is Program Memory. This type of
table can have up to 255 entries, numbered 1
through 255. Number 0 cannot be used, because
at the time the MOVC instruction is executed, the
PC contains the address of the RET instruction.
An entry numbered 0 would be the RET opcode it-
self.
Table 12. Boolean Instructions
Boolean Instructions
The
μ
PSD3200 Family devices contain a com-
plete Boolean (single-bit) processor. One page of
the internal RAM contains 128 address-able bits,
and the SFR space can support up to 128 addres-
sable bits as well. All of the port lines are bit-ad-
Address Width
Mnemonic
Operation
8 bits
MOVX A,@Ri
Read external RAM @Ri
8 bits
MOVX @Ri,A
Read external RAM @Ri
8 bits
MOVX A,@DPTR
Read external RAM @DPTR
16 bits
MOVX @DPTR,a
Read external RAM @DPTR
Mnemonic
Operation
MOVC A,@A+DPTR
Read program memory at
(A+DPTR)
MOVC A,@A+PC
Read program memory at
(A+PC)
Mnemonic
Operation
ANL C,bit
C = A .AND. bit
ANL C,/bit
C = C .AND. .NOT.bit
ORL C,bit
C = A .OR. bit
ORL C,/bit
C = C .OR. .NOT.bit
MOV C,bit
C = bit
MOV bit,C
bit = C
CLR C
C = 0
CLR bit
bit = 0
SETB C
C = 1
SETB bit
bit = 1
CPL C
C = .NOT.C
CPL bit
bit = .NOT.bit
JC rel
Jump if C =1
JNC rel
Jump if C = 0
JB bit,rel
Jump if bit =1
JNB bit,rel
Jump if bit = 0
JBC bit,rel
Jump if bit = 1; CLR bit
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