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參數資料
| 型號： | uPSD3233 |
| 廠商： | 意法半導體 |
| 英文描述： | Flash Programmable System Device with 8032 Microcontroller Core(嵌入高速“8032微控制器核”的Flash型可編程系統(tǒng)器) |
| 中文描述： | 閃存可編程系統(tǒng)器件與8032微控制器內核（嵌入高速“8032微控制器核”的閃存型可編程系統(tǒng)器） |
| 文件頁數： | 38/164頁 |
| 文件大小： | 1133K |
| 代理商： | UPSD3233 |
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μ
PSD3200 FAMILY
38/164
DRAFT(Thursday 20 June 2002, 13:15).
How Interruptsare Handled
The interrupt flags are sampled at S5P2 of every
machine cycle. The samples are polled during fol-
lowing machine cycle. If one of the flags was in a
set condition at S5P2 of the preceding cycle, the
polling cycle will find it and the interrupt system will
generate anLCALL to the appropriate service rou-
tine, provided this H/W generated LCALL is not
blocked by any of the following conditions:
I
An interrupt of equal priority or higher priority
level is already in progress.
I
The current machine cycle is not the final cycle
in the execution of the instruction in progress.
I
The instruction in progress is RETI or any
access to the interrupt priority or interrupt
enable registers.
The polling cycle is repeated with each machine
cycle, and the values polled are the values that
were present at S5P2 of the previous machine cy-
cle. Note that if an interrupt flag is active butbeing
responded to for one of the above mentioned con-
ditions, ifthe flagis still inactive when the blocking
condition is removed, the denied interrupt will not
be serviced. In other words, the fact that the inter-
rupt flag was once active but not servicedis notre-
membered. Every polling cycle is new.
The processor acknowledges an interrupt request
by executing a hardware generated LCALL to the
appropriate service routine. The hardware gener-
ated LCALL pushes the contents of the Program
Counter on to the stack (but it does not save the
PSW) and reloads the PCwith anaddress that de-
pends on the source of the interrupt being vec-
tored to as shown in Table 24.
Execution proceeds from that location until the
RETI instructionis encountered.The RETIinstruc-
tion informsthe processor that the interrupt routine
is no longer in progress, then pops the top two
bytes from the stack and reloads the Program
Counter. Execution of the interrupted program
continues from where it left off.
Note that a simple RET instruction would also re-
turn execution to the interrupted program, but it
would have left the interrupt control system think-
ing an interrupt was still in progress, making future
interrupts impossible.
Table 24. Vector Addresses
Source
Vector Address
Int0
0003h
2nd USART
004Bh
Timer0
000Bh
I C
0043h
Int1
0013h
DDC
003Bh
Timer1
001Bh
USB
0033h
1st USART
0023h
Timer2+EXF2
002Bh
相關PDF資料 |
PDF描述 |
|---|---|
| uPSD3234(中文) | Flash Programmable System Device with 8032 Microcontroller Core(嵌入高速“8032微控制器核”的Flash型可編程系統(tǒng)器) |
| uPSD3212C(中文) | Flash Programmable System Devices with 8032 Microcontroller Core and 16Kbit SRAM(帶8032微控制器內核和16Kbit SRAM的FLASH可編程系統(tǒng)器件) |
| uPSD3254A(中文) | Flash Programmable System Devices with 8032 Microcontroller Core(帶8032微控制器內核的FLASH可編程系統(tǒng)器件) |
| uPSD3254BV(中文) | Flash Programmable System Devices with 8032 Microcontroller Core(帶8032微控制器內核的FLASH可編程系統(tǒng)器件) |
| UPSD3234A | Flash Programmable System Devices with 8032 Microcontroller Core |
相關代理商/技術參數 |
參數描述 |
|---|---|
| UPSD3233A-24T1 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash Programmable System Device with 8032 Microcontroller Core |
| UPSD3233A-24T1T | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash Programmable System Devices with 8032 Microcontroller Core |
| UPSD3233A-24T6 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash Programmable System Device with 8032 Microcontroller Core |
| UPSD3233A-24T6T | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash Programmable System Devices with 8032 Microcontroller Core |
| UPSD3233A-24U1 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash Programmable System Device with 8032 Microcontroller Core |
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