參數(shù)資料
型號: E-110
廠商: LSI Corporation
英文描述: 100BASE-T Fast Ethernet Core(100BASE-T快速以太網(wǎng)處理芯片 Fast Ethernet Core)
中文描述: 100兆- T的快速以太網(wǎng)核心(100兆- T的快速以太網(wǎng)處理芯片快速以太網(wǎng)核心)
文件頁數(shù): 117/130頁
文件大小: 770K
代理商: E-110
MIIM Core Pin Summary
5-11
5.7 MIIM Core Pin Summary
Table 5.6 summarizes the MIIM core input and output signals. The table
provides the signal names and types for both outputs and inputs.
Table 5.6
MIIM Core Pin Summary
Mnemonic
Description
Type
Active
BUSY
Busy
Output
HIGH
CLKS
Clock Select
Input
HIGH
CTLD[15:0]
Control Data
Input
FIAD[4:0]
PHY Address[4:0]
Input
HCLK
Host Clock
Input
HIGH
HRST_L
Host Reset
Input
LOW
LCTLD
Load Control Data
Input
HIGH
MDC
MIIM Data Clock
Output
HIGH
MDI
MIIM Data In
Input
MDO
MIIM Data Out
Output
MDOEN
MIIM Data 3-State Enable
Output
HIGH
MIILF
MII Link Failure
Output
HIGH
NVALID
Invalid
Output
HIGH
PRSD[15:0]
PHY Read Status Data
Output
RGAD[4:0]
Register Address[4:0]
Input
RSTAT
Request MII Status
Input
HIGH
SCAN
Status Read Scan
Input
HIGH
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