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參數(shù)資料
| 型號(hào)： | E-110 |
| 廠商： | LSI Corporation |
| 英文描述： | 100BASE-T Fast Ethernet Core(100BASE-T快速以太網(wǎng)處理芯片 Fast Ethernet Core) |
| 中文描述： | 100兆- T的快速以太網(wǎng)核心（100兆- T的快速以太網(wǎng)處理芯片快速以太網(wǎng)核心） |
| 文件頁(yè)數(shù)： | 51/130頁(yè) |
| 文件大?。?/td> | 770K |
| 代理商： | E-110 |
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MAC Core Signals
2-19
When the MAC transmits a packet, the MAC truncates
any data beyond 1536 bytes (when HUGEN is deas-
serted) or 32 Kbytes (when HUGEN is asserted) and
asserts the TSV26 signal (see Section 2.1.6, “Statistics
Vector to Host Signals,” on page 2-21), which indicates
that the packet was aborted because of excessive length.
Note that the MAC does not begin truncating the data
immediately after 1518 bytes.
When the MAC receives a packet longer than 1518 bytes
(with HUGEN deasserted), or 32 Kbytes (with HUGEN
asserted), the MAC asserts the RSV23 signal (see Sec-
tion 2.1.6, “Statistics Vector to Host Signals”), which indi-
cates that a bad packet has been received. However, the
MAC continues to accept bytes until 1536 bytes or
32 Kbytes, beyond which it stops accepting bytes.
IPGR1[6:0]
Non Back-to-Back IPG (Part 1)
The IPGR1[6:0] signals contain the programmable trans-
mit interpacket gap (IPG) for non back-to-back transmits,
Part 1. Non back-to-back transmits allow a receive to
occur between transmits. The MAC core samples the
IPGR1[6:0] signals synchronously with the rising edge of
the MTXC clock during reset. For a detailed discussion of
the IPGR1[6:0] signals, see “IPG Half-Duplex Operation”
on page 3-6.
Input
IPGR2[6:0]
Non Back-to-Back IPG (Part 2)
The IPGR2[6:0] signals contain the programmable trans-
mit IPG for non back-to-back transmits, Part 2. The MAC
core samples the IPGR2[6:0] signals synchronously with
the rising edge of the MTXC clock during reset. For a
detailed discussion of IPGR2[6:0], see “IPG Half-Duplex
Operation” and “IPG Full-Duplex Operation” on page 3-6.
Input
IPGT[6:0]
Back-to-Back IPG
The IPGT[6:0] signals contain the programmable transmit
IPG for back-to-back transmits. Nominal operation
requires that IPGT[6:0] have a value of 18. For a detailed
discussion of IPGT[6:0], see “IPG Half-Duplex Operation”
on page 3-6.
Input
The MAC core samples the IPGT[6:0] signals synchro-
nously with the rising edge of the MTXC clock during
reset. For a detailed discussion of IPGT[6:0], see “IPG
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