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參數(shù)資料
| 型號： | E-110 |
| 廠商： | LSI Corporation |
| 英文描述： | 100BASE-T Fast Ethernet Core(100BASE-T快速以太網(wǎng)處理芯片 Fast Ethernet Core) |
| 中文描述： | 100兆- T的快速以太網(wǎng)核心（100兆- T的快速以太網(wǎng)處理芯片快速以太網(wǎng)核心） |
| 文件頁數(shù)： | 88/130頁 |
| 文件大?。?/td> | 770K |
| 代理商： | E-110 |
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3-16
Core Descriptions
preamble is seen following a valid IPG. The MAC asserts the RSV25
signal, one of the bits of the Receive Statistics Vector, to indicate that a
carrier event occurred. The receive function notes a long event if the
MCRS signal is asserted for over 24,288 bit times if the HUGEN signal
is not asserted and over 524,288 bit times if HUGEN is asserted.
Other modules can use the RRST_L signal as a host reset synchronized
to the MRXC receive clock. Because the MRXC signal can be slow with
respect to a host reset pulse, or even stopped,
1
the MAC latches the host
reset signal, HRST_L, without using MRXC and uses the HRST_L signal
to assert RRST_L asynchronously to MRXC. The MAC then deasserts
RRST_L synchronously on the transition of the MRXC clock.
Receive Function to Host Interface –
The interface between the
E-110 MAC receive function and the host consists of the following:
Receive control logic
Receive byte stream signals
Status Signals
The receive control logic is a designer-specific implementation. It may
contain temporary storage in the form of buffers or FIFOs for receive
bytes from the MAC, and it may translate receive byte stream signals
from the receive function that are compatible with the host interface
signals.
The host receives the byte stream from the receive function over an
eight-bit parallel data interface consisting of the RPD[7:0] signals.
The status signals from the receive function to the host are RPDV, RPSF,
RPEF, RRST_L, CRCO[9:1], CRCG, BCO, MCO, and BYTE7. For more
details on these signals, see the subsection entitled “Receive Function
to Host Signals” on page 2-5.
Receive Function to Statistics Interface –
The interface between the
receive function and external statistics collection logic consists of the
RSV[25:0] and RSVP_L signals. For more details on these signals, see
Section 2.1.6, “Statistics Vector to Host Signals,” on page 2-21.
1. MRXC from the PHY may be extended by a cycle when the PHY switches from recovered
clock to nominal clock. See the subsection entitled “MRXC Receive Nibble or Symbol Clock
Input” on page 2-11.
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