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參數(shù)資料
| 型號： | E-110 |
| 廠商： | LSI Corporation |
| 英文描述： | 100BASE-T Fast Ethernet Core(100BASE-T快速以太網(wǎng)處理芯片 Fast Ethernet Core) |
| 中文描述： | 100兆- T的快速以太網(wǎng)核心（100兆- T的快速以太網(wǎng)處理芯片快速以太網(wǎng)核心） |
| 文件頁數(shù)： | 61/130頁 |
| 文件大?。?/td> | 770K |
| 代理商： | E-110 |
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MAC Control Module Signals
2-29
2.2.1 MAC Control Module to E-110 Core Signals
The signals that connect the optional MAC control module to the E-110
core are listed below (see also Section 2.1.3, “MAC Control Module
Signals (optional),” on page 2-7). All signals are active HIGH unless
otherwise indicated. Signal direction is with respect to the MAC control
module.
RPD[7:0]
Receive Packet Data
The RPD[7:0] signals are the receive data bus. The sig-
nals hold the received data byte for two MRXC clock
cycles.
Input
RPDV
Receive Packet Data Valid
A packet transmission from the receive function begins
when the receive function asserts the RPSF and RPDV
signal at the first byte of received packet data on
RPD[7:0] after removing the preamble and SFD. For sub-
sequent data bytes, the receive function asserts only the
RPDV signal until the last byte, when it asserts both
RPDV and RPEF.
Input
RPEF
Receive Packet End of Frame
The MAC asserts the RPEF signal for one MRXC clock
cycle to indicate that the last byte of the receive packet
is available to the MAC control module on RPD[7:0].
Input
RPSF
Receive Packet Start of Frame
The MAC asserts the RPSF signal for one MRXC clock
cycle to indicate that the first byte of a receive packet is
available to the MAC control module on RPD[7:0].
Input
RRST_L
Receive Reset
Other modules in an ASIC can use the RRST_L signal
as a host reset synchronized to the receive clock
(MRXC). Because the MRXC clock can be slow with
respect to a host reset pulse, or even stopped, the host
reset signal (HRST_L) is captured in the E-110 MAC
receive function, which asserts RRST_L asynchronously
to MRXC when HRST_L occurs and deasserts RRST_L
synchronously on the positive transition of MRXC.
Input
RSV_GOOD
Receive Statistics Vector Good
At the end of a receive frame, the MAC updates the
Receive Statistics Vector (RSV[25:0]). The MAC asserts
Input
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