參數(shù)資料
型號(hào): E-110
廠商: LSI Corporation
英文描述: 100BASE-T Fast Ethernet Core(100BASE-T快速以太網(wǎng)處理芯片 Fast Ethernet Core)
中文描述: 100兆- T的快速以太網(wǎng)核心(100兆- T的快速以太網(wǎng)處理芯片快速以太網(wǎng)核心)
文件頁數(shù): 67/130頁
文件大小: 770K
代理商: E-110
MIIM Core Signals
2-35
XMT_PAUSEF
Transmitted Pause Frame
The XMT_PAUSEF vector signal is asserted after the
transmission of a pause frame. It is deasserted if a data
packet is transmitted. This signal is valid on the falling
edge of the TSVP_L signal, which is asserted by the
E-110 core.
Output
2.3 MIIM Core Signals
The interface diagram for the optional MIIM core is shown in Figure 2.3.
Figure 2.3
MIIM Core Interface Diagram
2.3.1 MIIM Core to Host Signals
The signals that connect the MIIM core to the host are listed below. All
signals are active HIGH unless otherwise indicated. Signal direction is
with respect to the MIIM core.
BUSY
Busy
The MIIM core asserts the BUSY signal to indicate to the
host that a read, write, or scan operation is in progress.
BUSY is deasserted when no MII operation is in
progress.
Output
MII
CTLD[15:0]
FIAD[4:0]
RGAD[4:0]
RSTAT
SCAN
LCTLD
MIILF
NVALID
BUSY
CLKS
PRSD[15:0]
MII
to Host
Signals
Management
Core
Management
Core
MDO
MDI
MDOEN
MDC
MII
Management
Core
to PHY
Signals
HCLK
HRST_L
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