17-36
MCF5249UM
MOTOROLA
DMA Channel Interaction
ilSync interrupt — Set when the next longword to be read is first word of new block, and length of
previous block was not equal to 2352 bytes, the nominal block length.
crcError interrupt — Set when the next longword to be read is first word of new block, and CRC check
on previous block failed.
Figure 17-10 Block Encoder
The block encoder works on the incoming PDOR3 stream. First, CRC insertion is done in the CRC
Calculate and Insert (1), next the stream is scrambled in Scramble (2), and finally it is byte-swapped in
Byte Swaps (3). All three operations can be configured by writing to the blockControl register. CRC
insertion and scrambling are done as described in CD Yellow Book.
The CRC insertion 1 and the scrambling 2 are done on a block-by-block basis. A block is normally 2352
bytes long. A block starts after the so-called sync Pattern, “00FFFFFF-FFFFFFFF-FFFFFF00”. To detect
start of a new block, two mechanisms are build into the encoder.
First long-word of new block is assumed after finding the sync pattern
“00FFFFFF-FFFFFFFF-FFFFFF00”
First long-word of new block is assumed exactly 2352 bytes after first longword of previous block.
This second detection mechanism builds in immunity for corrupted syncs. Even if the sync is
corrupted, the block encoder will correctly find the start of the new block.
17.4.7.2
CD-ROM Encoder Interrupts
newBlock interrupt — Active when transmission of new block is started. No direct synchronization
with data written to the transmit fifo.
noSync interrupt — Set when the sync pattern was not recognized for the current newBlock interrupt.
ilSync interrupt — Set when the previous block did not have the correct length. (Length different from
2352 bytes).
17.5
DMA CHANNEL INTERACTION
It is possible to use DMA to transfer data to/from the FIFOs in the audio interface module. Only PDIR2 and
PDOR3 registers support DMA, as others need more than 1 long-word to transfer data to/from the FIFO
and cannot be used with DMA operation.
Swap
Bytes
Swap select
Scramble
On/Off select
23
Processor
Data
CRC
calculate
and
insert
Sync
Recognition
4
Sync Settings
To
audio
data
bus
1
newBlockInt
ilSyncInt
noSyncInt
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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