3-4
MCF5249UM
MOTOROLA
Processor Register Description
The following table describes the bits in the condition code register.
3.2.2
ENHANCED MULTIPLY ACCUMULATE MODULE (EMAC) USER
PROGRAMMING MODEL
The EMAC provides a variety of program-visible registers:
Four 48-bit accumulators (Raccx = Racc0, Racc1, Racc2, Racc3)
Eight 8-bit accumulator extensions (2 per accumulator), packaged as two 32-bit values for load and
store operations (Raccext01, Raccext23)
One 16-bit Mask Register (Rmask)
One 32-bit Status Register (MACSR) including four indicator bits signaling product or accumulation
overflow (one for each accumulator: PAV0, PAV1, PAV2, PAV3)
3.2.2.1 EMAC INSTRUCTION SET SUMMARY
The EMAC unit supports the integer multiply operations defined by the baseline ColdFire architecture, as
well as the multiply-accumulate instructions. The following table summarizes the EMAC unit instruction set.
Table 3-2 CCR Functionality
BIT
CODE
DESCRIPTION
7–5
—
Reserved, should be cleared.
4
X
Extend condition code bit. Assigned the value of the carry bit for arithmetic
operations; otherwise not affected or set to a specified result. Also used as an
input operand for multiple-precision arithmetic.
3
N
Negative condition code bit. Set if the msb of the result is set; otherwise cleared.
2
Z
Zero condition code bit. Set if the result equals zero; otherwise cleared.
1
V
Overflow condition code bit. Set if an arithmetic overflow occurs, implying that the
result cannot be represented in the operand size; otherwise cleared.
0
C
Carry condition code bit. Set if a carry-out of the data operand msb occurs for an
addition or if a borrow occurs in a subtraction; otherwise cleared.
Table 3-3 EMAC Instruction Summary
COMMAND
MNEMONIC
DESCRIPTION
Multiply Signed
MULS <ea>y,Dx
Multiplies two signed operands yielding a signed result
Multiply Unsigned
MULU <ea>y,Dx
Multiplies two unsigned operands yielding an unsigned
result
Multiply Accumulate
MAC Ry,RxSF,Raccx
MSAC Ry,RxSF,Raccx
Multiplies two operands, then adds/subtracts the product
to/from an accumulator
Multiply Accumulate with
Load
MAC Ry,RxSF,Rw,Raccx
MSAC Ry,RxSF,Rw,Raccx
Multiplies two operands, then combines the product to an
accumulator while loading a register with the memory
operand
Load Accumulator
MOV.L {Ry,#imm},Raccx
Loads an accumulator with a 32-bit operand
Store Accumulator
MOV.L Raccx,Rx
Writes the contents of an accumulator to a CPU register
Copy Accumulator
MOV.L Raccy,Raccx
Copies a 48-bit accumulator
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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