MCF5249 Functional Overview
MOTOROLA
Introduction
1-7
1.6.6
DRAM CONTROLLER
The MCF5249 DRAM controller provides a glueless interface for up to two banks of DRAM, each of which
can be up to 32 MBytes. The controller supports a 16-bit data bus. A unique addressing scheme allows for
increases in system memory size without rerouting address lines and rewiring boards. The controller
operates in page mode, non-page mode, and burst-page mode and supports SDRAMs.
1.6.7
SYSTEM INTERFACE
The MCF5249 provides a glueless interface to 16-bit port size SRAM, ROM, and peripheral devices with
independent programmable control of the assertion and negation of chip-select and write-enable signals.
The MCF5249 also supports bursting ROMs.
1.6.8
EXTERNAL BUS INTERFACE
The bus interface controller transfers information between the ColdFire core or DMA and memory,
peripherals, or other devices on the external bus. The external bus interface provides 23 bits of address
bus space, a 16-bit data bus, Output Enable, and Read/Write signals. This interface implements an
extended synchronous protocol that supports bursting operations.
1.6.9
SERIAL AUDIO INTERFACES
The MCF5249 digital audio interface provides four serial Philips IIS/Sony EIAJ interfaces. One interface is
a 4-pin (1 bit clock, 1 word clock, 1 data in, 1 data out), the other three interfaces are 3-pin (1 bit clock, 1
word clock, 1 data in or out). The serial interfaces have no limit on minimum sampling frequency.
Maximum sampling frequency is determined by the maximum frequency on the bit clock input. (1/3 the
frequency of the internal system clock.)
1.6.10
IEC958 DIGITAL AUDIO INTERFACES
The MCF5249 has two digital audio input interfaces, and one digital audio output interface. There are four
digital audio input pins and two digital audio output pins. An internal multiplexer selects one of the four
inputs to the digital audio input interface.
There is one digital audio output interface with two IEC958 outputs. One output carries the professional “c”
channel (Channel Status), and the other carries the consumer “c” channel. All other bits (audio data, user
channel bits, validity flag, etc) are identical.
The IEC958 output can take the output from the internal IEC958 generator, or multiplex out one of the four
IEC958 inputs.
1.6.11
AUDIO BUS
The audio interfaces connect to an internal bus that carries all audio data. Each receiver places its
received data on the audio bus and each transmitter takes data from the audio bus for transmission. Each
transmitter has a source select register.
In addition to the audio interfaces, there are six CPU accessible registers connected to the audio bus.
Three of these registers allow data reads from the audio bus and allow selection of the audio source. The
other three registers provide a write path to the audio bus and can be selected by transmitters as the audio
source. Through these registers, the CPU has access to the audio samples for processing.
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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