
20-8
MCF5249UM
MOTOROLA
JTAG Registers
has been implemented in accordance with 1149.1 so that the shift register stage is set to logic zero on the
rising edge of TCK following entry into the capture-DR state. Therefore, the first bit to be shifted out after
selecting the bypass register is always a logic zero (to differentiate a part that supports an IDCODE
register from a part that supports only the bypass register). The BYPASS instruction goes active on the
falling edge of TCK in the update-IR state when the data held in the instruction shift register is equivalent to
hex F.
20.4.2
IDCODE REGISTER
An IEEE 1149.1A compliant JTAG identification register has been included on the MCF5249. The
MCF5249 JTAG instruction encoded as hex 1 provides for reading the JTAG IDcode register.
20.4.3
JTAG BOUNDARY SCAN REGISTER
The MCF5249 model includes an IEEE 1149.1A-compliant boundary-scan register. The boundary-scan
register is connected between TDI and TDO when the EXTEST or SAMPLE/PRELOAD instructions are
selected. This register captures signal pin data on the input pins, forces fixed values on the output signal
pins, and selects the direction and drive characteristics (a logic value or high impedance) of the
bidirectional and three-state signal pins. A detailed description of the boundary scan register bits for the
Table 20-3 ID Code Register Command
BITS
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
FIELD
VERSION NUMBER
DESIGN CENTER
DEVICE NUMBER
RESET
001001010100000
0
R/W
ADDR
BITS
15
14
13
12
11
10
987654321
0
FIELD
DEVICE NUMBER
JEDECID
JTAGID
RESET
011000000001110
1
R/W
ADDR
Table 20-4 ID Code Bit Descriptions
BIT NAME
DESCRIPTION
Bits 31-28
The Version Number bits indicate the revision number of the MCF5249.
Bits 27-22
The Design Center bits indicate the Munich design center.
Bits 21-12
The Device Number bits indicate an MCF5249.
Bits 11-1
The JEDEC ID bits indicate the reduced JEDEC ID for Motorola (JEDEC refers to the Joint
Electron Device Engineering Council. Refer to JEDEC publication 106-A and section 11 of
the IEEE 1149.1A Standard for further information on this field).
Bit 0
Differentiates this register as the JTAG ID code register (as opposed to the bypass register)
according to the IEEE 1149.1A Standard.
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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