THUMB Instruction Set
ARM7TDMI Data Sheet
ARM DDI 0029E
5-14
O
5.5.2 Instruction cycle times
All instructions in this format have an equivalent ARM instruction as shown in
·
Table
5-6: Summary of format 5 instructions
on page 5-13. The instruction cycle times for the
THUMB instruction are identical to that of the equivalent ARM instruction. For more
information on instruction cycle times, please refer to
·
Chapter 10, Instruction Cycle
Operations
.
5.5.3 The BX instruction
BX performs a Branch to a routine whose start address is specified in a Lo or Hi
register.
Bit 0 of the address determines the processor state on entry to the routine:
Bit 0 = 0
causes the processor to enter ARM state.
Bit 0 = 1
causes the processor to enter THUMB state.
Note
The action of H1 = 1 for this instruction is undefined, and should not be used.
01
0
1
CMP Rd, Hs
CMP Rd, Hs
Compare a register in the range 0-7
with a register in the range 8-15. Set
the condition code flags on the result.
01
1
0
CMP Hd, Rs
CMP Hd, Rs
Compare a register in the range 8-15
with a register in the range 0-7. Set the
condition code flags on the result.
01
1
1
CMP Hd, Hs
CMP Hd, Hs
Compare two registers in the range 8-
15. Set the condition code flags on the
result.
10
0
1
MOV Rd, Hs
MOV Rd, Hs
Move a value from a register in the
range 8-15 to a register in the range 0-
7.
10
1
0
MOV Hd, Rs
MOV Hd, Rs
Move a value from a register in the
range 0-7 to a register in the range 8-
15.
10
1
1
MOV Hd, Hs
MOV Hd, Hs
Move a value between two registers in
the range 8-15.
11
0
0
BX Rs
BX Rs
Perform branch (plus optional state
change) to address in a register in the
range 0-7.
11
0
1
BX Hs
BX Hs
Perform branch (plus optional state
change) to address in a register in the
range 8-15.
Op
H1
H2
THUMB assembler
ARM equivalent
Action
Table 5-6: Summary of format 5 instructions (Continued)