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參數(shù)資料
| 型號(hào)： | ARM7TDMI |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | general purpose 32-bit microprocessors |
| 中文描述： | 通用32位微處理器 |
| 文件頁(yè)數(shù)： | 190/268頁(yè) |
| 文件大小： | 1289K |
| 代理商： | ARM7TDMI |
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Debug Interface
ARM7TDMI Data Sheet
ARM DDI 0029E
8-10
O
In the descriptions that follow,
TDI
and
TMS
are sampled on the rising edge of
TCK
and all output transitions on
TDO
occur as a result of the falling edge of
TCK
.
8.8.1 EXTEST (0000)
The selected scan chain is placed in test mode by the EXTEST instruction.
The EXTEST instruction connects the selected scan chain between
TDI
and
TDO
.
When the instruction register is loaded with the EXTEST instruction, all the scan cells
are placed in their test mode of operation.
In the CAPTURE-DR state, inputs from the system logic and outputs from the output
scan cells to the system are captured by the scan cells. In the SHIFT-DR state, the
previously captured test data is shifted out of the scan chain via
TDO
, while new test
data is shifted in via the
TDI
input. This data is applied immediately to the system logic
and system pins.
8.8.2 SCAN_N (0010)
This instruction connects the Scan Path Select Register between
TDI
and
TDO
.
During the CAPTURE-DR state, the fixed value 1000 is loaded into the register. During
the SHIFT-DR state, the ID number of the desired scan path is shifted into the scan
path select register. In the UPDATE-DR state, the scan register of the selected scan
chain is connected between
TDI
and
TDO
, and remains connected until a subsequent
SCAN_N instruction is issued. On reset, scan chain 3 is selected by default. The scan
path select register is 4 bits long in this implementation, although no finite length is
specified.
8.8.3 INTEST (1100)
The selected scan chain is placed in test mode by the INTEST instruction.
The INTEST instruction connects the selected scan chain between
TDI
and
TDO
.
When the instruction register is loaded with the INTEST instruction, all the scan cells
are placed in their test mode of operation.
In the CAPTURE-DR state, the value of the data applied from the core logic to the
output scan cells, and the value of the data applied from the system logic to the input
scan cells is captured.
In the SHIFT-DR state, the previously captured test data is shifted out of the scan
chain via the
TDO
pin, while new test data is shifted in via the
TDI
pin.
Single-step operation is possible using the INTEST instruction.
8.8.4 IDCODE (1110)
The IDCODE instruction connects the device identification register (or ID register)
between
TDI
and
TDO
. The ID register is a 32-bit register that allows the
manufacturer, part number and version of a component to be determined through the
TAP. See
·
8.9.2 ARM7TDMI device identification (ID) code register
on page 8-13 for
the details of the ID register format.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AS1431 | Precision Adjustable Shunt Reference |
| AS1431DR4LP13 | Precision Adjustable Shunt Reference |
| AS1431DR4LP7 | Precision Adjustable Shunt Reference |
| AS1431DR4LPA | Precision Adjustable Shunt Reference |
| AS1431DR4LPB | Precision Adjustable Shunt Reference |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ARM7TDMI_G | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Technical Reference Manual |
| ARM7TDMI-S | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:周立功的中文ARM7TDI文檔 |
| ARM920T | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:System-on-Chip Platform OS Processor |
| ARM940T | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:TECHNICAL REFERENCE MANUAL |
| ARM946E-S | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:ARM946E-S Microprocessor Core with Cache technical manual 6/01 |
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