ICEBreaker Module
ARM7TDMI Data Sheet
ARM DDI 0029E
9-6
O
nOPC
:
is used to detect whether the current cycle is an instruction fetch
(
nOPC
= 0) or a data access (
nOPC
= 1).
nTRANS
:
compares against the not translate signal from the core in order to
distinguish between User mode (
nTRANS
= 0) and non-User mode
(
nTRANS
= 1) accesses.
EXTERN
:
is an external input to ICEBreaker which allows the watchpoint to be
dependent upon some external condition. The
EXTERN
input for
Watchpoint 0 is labelled
EXTERN0
and the
EXTERN
input for
Watchpoint 1 is labelled
EXTERN1
.
CHAIN
:
can be connected to the chain output of another watchpoint in order
to implement, for example, debugger requests of the form “breakpoint
on address YYY only when in process XXX”.
In the ARM7TDMI-ICEBreaker, the
CHAINOUT
output of Watchpoint
1 is connected to the
CHAIN
input of Watchpoint 0. The
CHAINOUT
output is derived from a latch; the address/control field comparator
drives the write enable for the latch and the input to the latch is the
value of the data field comparator. The
CHAINOUT
latch is cleared
when the Control Value register is written or when
nTRST
is LOW.
RANGE
:
can be connected to the range output of another watchpoint register.
In the ARM7TDMI-ICEBreaker, the
RANGEOUT
output of
Watchpoint 1 is connected to the
RANGE
input of Watchpoint 0. This
allows the two watchpoints to be coupled for detecting conditions that
occur simultaneously, eg for range-checking.
ENABLE
:
If a watchpoint match occurs, the
BREAKPT
signal will only be
asserted when the
ENABLE
bit is set. This bit only exists in the value
register: it cannot be masked.
For each of the bits 8:0 in the Control Value register, there is a corresponding bit in the
Control Mask register. This removes the dependency on particular signals.
9.3
Programming Breakpoints
Breakpoints can be classified as hardware breakpoints or software breakpoints.
Hardware breakpoints
typically monitor the address value and can be set in any
code, even in code that is in ROM or code that is self-
modifying.
Software breakpoints
monitor a particular bit pattern being fetched from any
address. One ICEBreaker watchpoint can thus be used
to support any number of software breakpoints. Software
breakpoints can normally only be set in RAM because an
instruction has to be replaced by the special bit pattern
chosen to cause a software breakpoint.