Data Sheet
June 2001
DSP16410B Digital Signal Processor
234
Agere Systems—Proprietary
Use pursuant to Company instructions
Agere Systems Inc.
6 Software Architecture
(continued)
6.2 Registers
(continued)
6.2.3 Register Encodings
(continued)
Table 142. auc1 (Arithmetic Unit Control 1) Register
15
14—12
XYFBK[2:0]
11—6
ACLR[7:2]
5—0
Reserved
ASAT[7:2]
Bit
15
Field
Reserved
XYFBK[2:0]
Value
0
000
001
010
011
Description
R/W Reset Value
R/W
R/W
Reserved—write with zero.
Normal operation.
Any DAU function result stored into
a6
[31:0] is also stored into
x
.
Any DAU function result stored into
a6
[31:16] is also stored into
xh
.
Any DAU function result stored into
a6
[31:16] is also stored into
xh
, and any
DAU function result stored into
a7
[31:16] is also stored into
xl
.
Reserved.
Any DAU function result stored into
a6
[31:0] is also stored into
y
.
§
Any DAU function result stored into
a6
[31:16] is also stored into
yh
.
§
Any DAU function result stored into
a6
[31:16] is also stored into
yh
, and any
DAU function result stored into
a7
[31:16] is also stored into
yl
.
§
The DAU clears
a7l
if it loads
a7h
.
The DAU leaves
a7l
unchanged if it loads
a7h
.
The DAU clears
a6l
if it loads
a6h
.
The DAU leaves
a6l
unchanged if it loads
a6h
.
The DAU clears
a5l
if it loads
a5h
.
The DAU leaves
a5l
unchanged if it loads
a5h
.
The DAU clears
a4l
if it loads
a4h
.
The DAU leaves
a4l
unchanged if it loads
a4h
.
The DAU clears
a3l
if it loads
a3h
.
The DAU leaves
a3l
unchanged if it loads
a3h
.
The DAU clears
a2l
if it loads
a2h
.
The DAU leaves
a2l
unchanged if it loads
a2h
.
Enable
a7
saturation
§§
on 32-bit overflow.
Disable
a7
saturation on 32-bit overflow.
Enable
a6
saturation
§§
on 32-bit overflow.
Disable
a6
saturation on 32-bit overflow.
Enable
a5
saturation
§§
on 32-bit overflow.
Disable
a5
saturation on 32-bit overflow.
Enable
a4
saturation
§§
on 32-bit overflow.
Disable
a4
saturation on 32-bit overflow.
Enable
a3
saturation
§§
on 32-bit overflow.
Disable
a3
saturation on 32-bit overflow.
Enable
a2
saturation
§§
on 32-bit overflow.
Disable
a2
saturation on 32-bit overflow.
0
14—12
If the application enables any of the XYFBK modes, i.e., XYFBK[2:0]
≠
000, the following apply:
Only if the DAU writes its result to
a6
or
a7
(e.g.,
a6=a3+p0
) will the result be written to
x
or
y
. Data transfers or data move operations (e.g.,
a6=*r2
) leave the
x
or
y
register unchanged regardless of the state of the XYFBK[2:0] field setting.
If the instruction itself loads the same portion of the
x
or
y
register that the XYFBK[2:0] field specifies, the instruction load takes precedence.
If the application enables the X=Y= mode (
auc0
[7] = 1), the XYFBK mode takes precedence.
If the application enables the X=Y= mode (
auc0
[7] = 1), the DAU also writes the
y
register value into the
x
,
xh
, or
xl
register as appropriate.
If the application enables the YCLR mode (
auc0
[6] = 0), the DAU clears
yl
.
If the application enables the YCLR mode (
auc0
[6] = 0) and the instruction contains a result written to
a6
and the operation writes no result to
a7
, the
DAU clears
. If the application enables the YCLR mode and the instruction writes a result to
a7
, the XYFBK mode takes precedence and the DAU
does not clear
yl
.
§§ If saturation is enabled and any portion of an accumulator is stored to memory or a register, the DAU saturates the entire accumulator value and stores
the appropriate portion. The DAU does not change the contents of the accumulator.
000
§
100
101
110
111
11
ACLR[7]
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
R/W
0
10
ACLR[6]
R/W
0
9
ACLR[5]
R/W
0
8
ACLR[4]
R/W
0
7
ACLR[3]
R/W
0
6
ACLR[2]
R/W
0
5
ASAT[7]
R/W
0
4
ASAT[6]
R/W
0
3
ASAT[5]
R/W
0
2
ASAT[4]
R/W
0
1
ASAT[3]
R/W
0
0
ASAT[2]
R/W
0