參數(shù)資料
型號(hào): KS9245
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: Automated CD-ROM Controller(光盤(pán)驅(qū)動(dòng)器控制器器)
中文描述: 自動(dòng)CD - ROM控制器(光盤(pán)驅(qū)動(dòng)器控制器器)
文件頁(yè)數(shù): 10/102頁(yè)
文件大小: 419K
代理商: KS9245
SAMSUNG
Version: TM 2.4
KS9245 ATAPI Automated CD-ROM Controller
Preliminary Technical Manual
_____________________________________________________________
Do Not Copy or Release
1-10
The Audio Buffering Mode is used for CD-DA copy operations. In this mode, the descrambler, ECC, and
EDC logic are not active and a decoder interrupt is generated to the microprocessor for every 2352-byte.
The buffering operation for data stream is active. The CD-DA data can be accurately synchronized with
the subcode data stream if the
AsynWrt
bit in the
ECC Control 2 Register
(3Ch, bit 3) is set.
In the ECC mode, the descrambler, EDC, and ECC are all active with various correction configurations.
This mode is normally used for buffering CD data such as Yellow Book, CD-ROM XA, or CD-I data. The
correction modes are configured by setting the
ECC Control 1 Register
(3Bh). The decoder interrupts
occur at either the completion of
On-The-Fly-EDC
TM
check when there is no EDC error, or at the end of
ECC operations in this mode. The
Decoder Header Min/Sec/Frame/Mode Registers
(30h, 31h, 32h,
33h),
Decoder Subheader 0-3 Registers
(34h, 35h, 36h, 37h), and the
ECC Status Register
(3Dh)
contains the information for the block just processed.
The Buffering Only Mode is used for processing Yellow Book Mode 0 and 2 data. In this mode, only the
descrambler is active. Neither ECC nor EDC logic will be applied in this mode. The settings of the
ECC
Control 1 Register
(3Bh) is ignored by hardware. The decoder interrupt occurs at the end of buffering a
block to the buffer DRAM.
If no correction is applied, there is a full sector time for firmware to process the decoder interrupt in most
cases. For the KS9245, the maximum time allowed for firmware to process the interrupt is a half sector
time. In the Firmware Sector Process Time of the Hardware Application Note section, detailed
information is provided for various disk speeds.
On-the-fly-EDC
TM
correction
The KS9245 supports On-The-Fly-EDC
TM
correction. Both Yellow Book Mode 1 and XA Mode 2, Form 1
of incoming DSP data streams are automatically checked by the EDC circuit. If there is no EDC error,
the decoder interrupt is immediately generated without further delay and no redundant ECC is applied.
As a result, the Buffer Manager can transfer the data to host without ECC latency and lower CPU
utilization is achieved. If there is an EDC error, the consecutive ECC correction will be applied. On-The-
Fly-EDC
TM
check can also resolve the buffer DRAM requirements. Therefore, the KS9245 can support
the high speed CD application up to 50X with standard DRAMs.
Advanced Erasure Correction up to 2-byte error per Codeword
The KS9245 supports high performance erasure correction up to 2-byte error per Codeword. The Erasure
Correction is enabled by setting the
EraCorr
bit in the
ECC Control 1 Register
(3Bh, bit 0). The erasure
correction logic uses the C2PO error flags as correction indication. Therefore, C2PO error flags must be
provided in this mode. The standard P and Q Parity Correction are supported for 1-byte error per
Codeword. The P and Q Parity are enabled by setting the
EccPen
or
EccQen
bits in the
ECC Control 1
Register
(3Bh, bit 2, 1).
CD-DA COPY support
The KS9245 also supports CD-DA buffering operations. By setting the
AudiWrt
bit in the
Decoder Control
Register
(3Bh, bit 4), the decoder is placed into Audio Buffering Mode. The decoder circuit starts to
synchronize with the first left channel. If the
ASynWrt
bit in the
ECC Control 2 Register
(3Ch, bit 3) is set,
the CD-DA data stream will be synchronized with the subcode Sync Mark. As a result, the data of CD-DA
operations are smoothly connected for different accesses. In Audio Buffering Mode, the internal counter
is active and an interrupt is generated to the host for every 2352-bytes.
Audio Playback in CAV mode support
In CAV (Constant Angular Velocity) applications, the KS9245 allows audio data to be buffered and
played at regular CAV speeds without changing the speed to CLV (Constant Linear Velocity) or single
speed modes. Along with the CD-DA subcode synchronization techniques in KS9245, Audio frame data
相關(guān)PDF資料
PDF描述
KS9246 ATAPI AUTOMATED CD-ROM CONTROLLER WITH EMBEDDED DRAM
KS9284 Digital Signal Processor(數(shù)字信號(hào)處理器)
KSA1013 PNP (COLOR TV AUDIO OUTPUT)
KSA1013 Color TV Audio Output Color TV Vertical Deflection Output
KSA1015GR LOW FREQUENCY AMPLIFIER
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
KS9246 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:ATAPI AUTOMATED CD-ROM CONTROLLER WITH EMBEDDED DRAM
KS926S2 制造商:FUJI 制造商全稱:Fuji Electric 功能描述:LOW LOSS SUPER HIGH SPEED RECTIFIER
KS926S2_07 制造商:FUJI 制造商全稱:Fuji Electric 功能描述:LOW LOSS SUPER HIGH SPEED RECTIFIER
KS9282B 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:CMOS INTEGRATED CIRCUIT
KS9286 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:DIGITAL SIGNAL PROCESSOR for CDP