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參數(shù)資料
| 型號： | KS9245 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | Automated CD-ROM Controller(光盤驅動器控制器器) |
| 中文描述： | 自動CD - ROM控制器（光盤驅動器控制器器） |
| 文件頁數(shù)： | 19/102頁 |
| 文件大小： | 419K |
| 代理商： | KS9245 |
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SAMSUNG
Version: TM 2.4
KS9245 ATAPI Automated CD-ROM Controller
Preliminary Technical Manual
_____________________________________________________________
Do Not Copy or Release
1-19
1.4.3 Pin Description in Microprocessor Interface
AD0-7
(Microprocessor address and data bus)
These signals are bi-directional multiplexed microprocessor address and data lines.
ALE
(Address latch enable)
RSB
(Register Select)
The falling edge of this signal is used as address latch for register access in Intel Mode.
This signal is used as Address Register Select in indirect register access mode. In this mode, RSB
pin is asserted as logic low state for Address Register and RSB pin is negated as logic high state for
Data Register.
RDB
(microprocessor read strobe)
DSB
(data strobe)
This signal is used as the read strobe signal in Intel multiplexed register addressing mode. When the
Motorola microprocessor is selected, this signal is acted as data strobe signal.
Pin 31,32,33,34,36,37,38,39
Pin 41
Pin 42
WRB
(microprocessor write strobe)
R/WB
(R/W Strobe)
This signal is used as the write strobe signal in Intel multiplexed register addressing mode. When the
Motorola microprocessor is selected, this signal is acted as read/write strobe signal.
Pin 43
HINTB
(Microprocessor host/buffer interrupt)
This signal is asserted as logic low state when interrupt status is available to microprocessor. This
interrupt indicates there is at least one host or buffer event which needs to be serviced by
microprocessor.
Pin 44
DINTB
(Microprocessor disk interrupt)
This signal is asserted as logic low state when interrupt status is available to microprocessor. This
interrupt indicates there is at least one decoder or disk event which needs to be serviced by
microprocessor. The disk interrupt can be combined with host interrupt in HINTB signal by clearing
IntMode
bit in
Interface Configuration Control Register
(0Bh, bit 7). The combined mode is the default
mode at power-on.
Pin 45
CSB
(Chip Select)
This signal must be asserted as logic low state for accessing registers of KS9245.
Pin 30
MSEL
(Microprocessor select)
This pin is used to select the Motorola microprocessor when it connects with pull-up resistor 22K.
Otherwise, with pull-down resistor 10K, the Intel microprocessor is selected. This pin is sampled only
when ISEL pin is negated at the power on stage.
Pin 91
ISEL
(microprocessor indirect register access select)
This pin is used to select the indirect register access mode when it connects with pull-up resistor
22K. Otherwise, with pull-down resistor 10K, the direct register access mode is selected. This pin is
sampled only at the power on stage.
Pin 88
In the indirect register access mode, the ALE/RSB pin is used to select register input. When RSB is
asserted, the Address Register is selected. When RSB is negated, the internal register addressed by
Address Register is accessed by microprocessor.
1.4.4 Pin Description in DSP Interface
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