參數(shù)資料
型號: KS9245
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: Automated CD-ROM Controller(光盤驅(qū)動器控制器器)
中文描述: 自動CD - ROM控制器(光盤驅(qū)動器控制器器)
文件頁數(shù): 62/102頁
文件大小: 419K
代理商: KS9245
SAMSUNG
Version: TM 2.4
KS9245 ATAPI Automated CD-ROM Controller
Preliminary Technical Manual
_____________________________________________________________
Do Not Copy or Release
6-12
Register 4Bh :
BIT 7
Reserved
BIT 5
BIT 6
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
Reserved
This register is reserved for future enhancements.
Register 4Ch :
DAC Output Format Selection Register (Read)
DAC Output Format Selection Register (Write)
DOFS
BIT 5
BIT 4
BIT 3
AFPS
ABCKL
Acronym:
BIT 7
ADAT18
BIT 6
ABCKD1
BIT 2
ALSBF
BIT 1
ALCH
BIT 0
ABCKF
The
DAC Output Format Selection Register
selects various audio output Interface formats in CAV
playback mode only.
Bit 7: ADAT18 (Audio data output as 18 bit format)
When this bit is set, the audio data format is 18-bits. When this bit is cleared, audio data format is
16-bits.
Bit 6: ABCKD1 (ABCK data sampling delay one clock)
When this bit is set, the data is delayed by one ABCK clock in sampling.
Bit 5: AFPS (Audio Forward Packet Stream)
When this bit is set, the main data stream is a forward packet stream.
Bit 4-3: ABCKL (Audio Bit Clock Length)
These two bits specify the audio data bit clock length.
Bit 2: ALSBF (Audio Channel Data LSB byte comes first)
When this bit is set, the KS9245 takes the first byte of audio data as the LSB and the second byte
as the MSB in the ADAT Pin. When this is cleared, the KS9245 takes the first byte of audio data
as the MSB and the second byte as the LSB in the ADAT Pin.
Bit 1: ALCH (Audio Left Channel High)
When this bit is set, a high level on AWCK pin indicates the left channel. When this is cleared, a
high level on the AWCK indicates the right channel.
Bit 0: ABCKF (Audio Data Latched on Falling Edge)
When this bit is set, the data is valid on the falling edge of the ABCK signal. When this bit is
cleared, the data is valid on rising edge of the ABCK signal.
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