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參數(shù)資料
| 型號： | KS9245 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | Automated CD-ROM Controller(光盤驅(qū)動器控制器器) |
| 中文描述： | 自動CD - ROM控制器（光盤驅(qū)動器控制器器） |
| 文件頁數(shù)： | 7/102頁 |
| 文件大?。?/td> | 419K |
| 代理商： | KS9245 |
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SAMSUNG
Version: TM 2.4
KS9245 ATAPI Automated CD-ROM Controller
Preliminary Technical Manual
_____________________________________________________________
Do Not Copy or Release
1-7
Automated BSY bit handle
The
BSY
bit of ATAPI Task File Register is controlled by KS9245. It ensures that the protocol is in
compliance with the ATA Specification. Using this feature, the firmware is assured to be compatible with
the Win 95/OS2/Win NT Operating Systems.
Also, the BSY bit can be set or cleared by firmware as manual mode by setting
SetBSY
or
ClrBSY
bits in
Host Interface Control Register
(0Ah, bit 7, 3), respectively
.
Automated DRQ bit handle
The
DRQ
bit in ATAPI Status Register is automated by the KS9245. The
DRQ
bit in the ATAPI Status
Register is set automatically where appropriate.
Automated DSC bit handle
The
DSC
bit in the ATAPI Status Register is fully automated. This is used to post overlap seek command
completion. This sequence starts by setting the
SDSC
bit in the
Host Sequence Command Register
(0Eh, bit 0).
Automated command completion handle
The command with either Successful or Error Completion sequence is supported by the KS9245. The
sequence starts by setting the S
Cpl
or
SCplChk
bits in the
Host Sequence Command Register
(0Eh, bit
2, 1) for ATAPI error or successful conditions, respectively. Also, the automated command completion is
extended into data transfers. With the completion of an entire host transfer, the ATAPI completion status
is posted to the host if the ACplE bit in the Transfer Sequence Command Register is set (0Fh, bit 6).
ATAPI Overlap Command - Service/Release support
Overlap command operations are supported by the KS9245. The ATAPI Release and Service protocols
are implemented by the KS9245. The Release sequence starts by setting the
Srelease
bit in the
Host
Sequence Command Register
(0Eh, Bit 4). The Service sequence starts by setting the
Sservice
bit in the
Host Sequence Command Register
(0Eh, Bit 5). Both interrupts on Release or Service can be disabled
by setting the
DisSerInt
or
DisRelInt
bits in the
Host Interface Diagnostic Control 2 Register
(51h, bit 7,
6).
Automated ATA Shadow command support
The shadow command is used when the drive is in the master mode and there is no slave drive
connected. The KS9245 will abort the command without firmware intervention when the host has issued
the command to a non-existent slave drive. The sequence is enabled by clearing the
DisShaR
bit in the
Interface Configuration Control Register
(0Bh, bit 2) when the
CDRV
bit is cleared (0Bh, bit 4) and the
SShadow
(0Bh, bit 3) bit is set in the
Interface Configuration Control Register.
1.1.3 Buffer Interface/Manager Functional Descriptions
The CD Cache Manager is supported by hardware in the KS9245. With the automated and integrated
architecture, the data transfers for entire Read and Read CD command are achieved. The Buffer
Manager state machine will monitor the buffer block count. The maximum number of blocks that can be
automatically transferred is 64K blocks, or about 128M bytes. With the powerful DRQ packet handling of
the KS9245, the host transfers are realized with very high performance. As a result, low CPU utilization
for high speed CD-ROM is achieved and code size minimized. The KS9245 supports up to 512K bytes of
16-bit Fast Page mode and EDO (Extended Data Output) DRAMs. The CD data block are organized in
either 2.5K bytes or 3K bytes per block. The CD data and subcode can be chosen to be buffered in both
configurations. In the latter case, the buffering for C2PO error flags and Block Error flags are included.
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| KS9246 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:ATAPI AUTOMATED CD-ROM CONTROLLER WITH EMBEDDED DRAM |
| KS926S2 | 制造商:FUJI 制造商全稱:Fuji Electric 功能描述:LOW LOSS SUPER HIGH SPEED RECTIFIER |
| KS926S2_07 | 制造商:FUJI 制造商全稱:Fuji Electric 功能描述:LOW LOSS SUPER HIGH SPEED RECTIFIER |
| KS9282B | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:CMOS INTEGRATED CIRCUIT |
| KS9286 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:DIGITAL SIGNAL PROCESSOR for CDP |
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