參數(shù)資料
型號: KS9245
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: Automated CD-ROM Controller(光盤驅(qū)動器控制器器)
中文描述: 自動CD - ROM控制器(光盤驅(qū)動器控制器器)
文件頁數(shù): 55/102頁
文件大?。?/td> 419K
代理商: KS9245
SAMSUNG
Version: TM 2.4
KS9245 ATAPI Automated CD-ROM Controller
Preliminary Technical Manual
_____________________________________________________________
Do Not Copy or Release
6-5
These bits are reserved for future enhancements.
Bit 3: Edcen (EDC Check Enable)
When this bit is set, the EDC Checker is enabled and the KS9245 performs an EDC check after
the ECC operation completes.
Bit 2: EccPen (ECC P Parity Check)
When this bit set, the ECC P Parity Checker is enabled and the ECC logic will correct the data
using the P Codewords.
Bit 1: EccQen (ECC Q Parity Check)
When this bit set, the ECC Q Parity Checker is enabled and the ECC logic will correct the data
using the Q Codewords.
Bit 0: EraCorr (C2PO Erasure Correction Enable)
When this bit is cleared, the C2PO error flags are not used for correction reference.
Register 3Ch :
ECC Control 2 Register (Read)
ECC Control 2 Register (Write)
ECC2
BIT 5
BIT 4
PacketWr
Acronym:
BIT 7
BIT 6
Reserved
BIT 3
ASynWrt
BIT 2
RepCorr
BIT 1
Rsvd
BIT 0
DisCowr
The
ECC Control 2 Register
controls special decoder operations.
Bit 7-5: Reserved
These bits are reserved for future enhancements.
Bit 4: PacketWr (Packet Writing Blocks Start/Stop)
When this bit is set, KS9245 will start reading CD-WO disc with packet writing.
Bit 3: ASynWrt (Audio Synchronized Buffering)
When this bit is set, the writing or buffering of CD-DA data is delayed until the first subcode in the
incoming DSP subcode stream is detected.
Bit 2: RepCorr (Repeat Correction Start)
The
RepCorr
bit triggers the repeat correction feature.
Bit 1: Reserved
This bit is reserved for future enhancements.
Bit 0: Reserved
This bit is reserved for future enhancements.
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