參數(shù)資料
型號(hào): KS9245
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: Automated CD-ROM Controller(光盤驅(qū)動(dòng)器控制器器)
中文描述: 自動(dòng)CD - ROM控制器(光盤驅(qū)動(dòng)器控制器器)
文件頁數(shù): 95/102頁
文件大?。?/td> 419K
代理商: KS9245
SAMSUNG
Version: TM 2.4
KS9245 ATAPI Automated CD-ROM Controller
Preliminary Technical Manual
_____________________________________________________________
Do Not Copy or Release
12-2
12.3 Sleep Mode
How To Enter Sleep Mode
KS9245 can be programmed into sleep mode for saving power and most of hardware will be cut off
by Clock. The only way into sleep mode is the register 2F Bit 7 Must be set to High.
How To Quit Sleep Mode
There are two ways to quit from sleep mode. One done by firmware is clear Bit 7 of register 2F
directly and The other is New ATA Command received or ATA Software reset Command received
in this case KS9245 Hardware will automatically wake up.
Something Important Before Enter Sleep Mode
In the sleep mode, DSP interface will be shut off automatically, so make sure KS9245 is in DSP
STOP mode. ECC engine and Buffer Manager are totally turned off. In DRAM Control logic, the
refresh time will still work to keep the buffer data is valid. Following Table is for each Block
Function affected by sleep mode.
Dram
Refresh
On
DSP
Subcod
e
Off
MicroP
ECC
EDC
Off
Buffer
Manager
Off
IDE
Sleep On
Off
On
On
How Much Power is saved in Sleep Mode
In the Sleep Mode, it is about 75%-80% less than the normal operation mode.
12.4 Automatic Power-savings Mode
Besides sleep mode, the KS9245 has an automatic power-savings feature for the CD-
DSP/Subcode interface, ECC, and CAV audio playback modules. In this mode, the clocks driving
these modules are stopped when the modules are not active. The following describes the
automatic power-savings feature:
1) The clock to the CD-DSP/Subcode interface is automatically shut off while the CD-decoder is
in Stop mode.
2) The clock to the ECC module is normally stopped until there is a header, a correction or repeat
correction request occurs. After the request is serviced, the ECC clock will again be
automatically shut off.
3) The clock to the CAV audio playback module is shut off until the SPA (Start Play Audio) bit 0
in register 4Dh is set.
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