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參數(shù)資料
| 型號： | KS9245 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | Automated CD-ROM Controller(光盤驅(qū)動器控制器器) |
| 中文描述： | 自動CD - ROM控制器（光盤驅(qū)動器控制器器） |
| 文件頁數(shù)： | 6/102頁 |
| 文件大?。?/td> | 419K |
| 代理商： | KS9245 |
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SAMSUNG
Version: TM 2.4
KS9245 ATAPI Automated CD-ROM Controller
Preliminary Technical Manual
_____________________________________________________________
Do Not Copy or Release
1-6
Bit7). Sleep Mode will automatically wake up and switch into the normal operation mode if the host has
written a command to the
ATAPI Command Register
(07h) or ATA Reset occurs. The auto wake up is
performed transparently and automatically. The Sleep Mode can only be applied when there is no host
transfers and the decoder is in Stop Mode. Thus, the KS9245’ s power management features provides
good solutions for power restricted environments.
1.1.2 ATAPI Host Interface Functional Descriptions
The ATAPI interface logic is completely automated. The KS9245 can receive the ATAPI Packet
Command and store the 12-byte command packet in a Packet FIFO. During data transfer stage, the
ATAPI transfer protocols are processed by KS9245 without firmware intervention. When the total number
of host requested blocks are transferred, the ATAPI command completion is posted if automatic
command completion is enabled.
Automated DASP handle to increase Master/Slave Compatibility
The KS9245 will assert the DASPB pin of the ATA interface signals in the slave mode when Power-on
Reset, Hardware Reset, or ATA SRST command is received. By asserting the DASPB pin, it allows the
master drive to identify the existence of the KS9245 as a slave drive. In some cases, the DASPB signal
is sampled by master drive as soon as the above event occurs. If the DASPB signal does not assert fast
enough, some master drives cannot recognize the existence of the slave drive. This feature is provided
to insure the most compatibility in the Master/Slave handshaking sequence. The master or slave drive is
configured by the MSTB pin. The KS9245 will sample this pin when the above events occur. If the
KS9245 is configured as a master drive, the PDIAGB and DASPB signals will be negated and left the
slave drive to control these signals. Additionally, the PDIAGB and DASPB pins can be asserted or
negated by setting
SetDASPB, SetPDIAGB, ClrDASPB, ClrPDIAGB
bits in
Host Interface Control
Register
(0Ah, bit 6,5,2,1). The microprocessor can read
DASPB
and
PDIAGB
bits in the
Host Interface
Signal Value Register
(0Ah, bit 2, 1) to get the values of the DASPB and PDAIGB signals of the ATA
interface.
Automated ATAPI Signature process
The ATAPI Signature is the required information for host to identify an ATAPI device. The ATAPI
Signature is reported in the
ATAPI Byte Count Registers
(04h, 05h) as 14h/EBh. The KS9245 will
initialize the ATA Task File Registers and setup the ATAPI Signature automatically. Moreover, the
KS9245 supports the ATAPI Signature for ATA Read and ATA Identify commands. The ATAPI Signature
is reported and command abort sequence will be posted by the KS9245 if the shadow feature is enabled.
Automated Packet Command Receiving
The KS9245 will process the ATAPI Packet Command (A0h) and receive 12-byte command packet after
host has written the command packet into the ATAPI Data Register. The 12-byte command packet is
stored in a Packet FIFO. The firmware is able to retrieve 12-byte command packet by consecutively
reading the
Packet FIFO Register
(00h). The 12-byte Packet FIFO is protected from over-run if more
than twelve bytes have written. Also, the data pointer of the Packet FIFO is reset whenever a new ATAPI
command is received. The Packet Command Interrupt mode assertion of the INTRQ line with the
assertion of command packet DRQ is supported. This is enabled by setting the
PcmdInt
bit in the
Interface Configuration Control Register
(0Bh, bit 1).
Automated DRQ Packet Handle
The KS9245 is able to calculate the transfer byte count and load it into the
ATAPI Byte Count Registers
(04h, 05h) when host transfer occurs. Moreover, the KS9245 will break the block-oriented transfers in the
Buffer Manager into byte-oriented transfers in the ATAPI interface without firmware intervention. Before
a DRQ packet transfer starts, the ATAPI Byte Count Registers are calculated and the ATAPI data
transfer protocol are processed by the KS9245.
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| KS9286 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:DIGITAL SIGNAL PROCESSOR for CDP |
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