參數(shù)資料
型號: KS9245
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: Automated CD-ROM Controller(光盤驅(qū)動器控制器器)
中文描述: 自動CD - ROM控制器(光盤驅(qū)動器控制器器)
文件頁數(shù): 27/102頁
文件大?。?/td> 419K
代理商: KS9245
SAMSUNG
Version: TM 2.4
KS9245 ATAPI Automated CD-ROM Controller
Preliminary Technical Manual
_____________________________________________________________
Do Not Copy or Release
2-1
Chapter 2
ATA/ATAPI Host Interface Registers
2.1 ATA Task File Registers
The ATA Task File Registers can be addressed by CS1FX/CS3FX/DA2/DA1/DA0 pins of ATA
Interface Signal. The ATA Task File Registers are specified as follows:
CS1FXB
A
CS3FXB
N
DA2
0
DA1
0
DA0
0
DA2-0
00h
Host Read
Host Write
ATA Data Register
ATAPI Data Register
ATA Error Register
ATAPI Error Register
ATA Sec Count Register
ATAPI Interrupt Reason Register
ATA Sec number Register
ATAPI Sam Tag Register
ATA Cyl. Low Register
ATAPI Byte Count Low Register
ATA Cyl. High Register
ATAPI Byte Count High Register
ATA Drive Sel Register
ATAPI Drive Sel Register
ATA Status Register
ATAPI Status Register
ATA Data Register
ATAPI Data Register
ATA Features Register
ATAPI Features Register
ATA Sec Count Register
ATAPI reserved
ATA Sec number Register
ATAPI Sam Tag Register
ATA Cyl. Low Register
ATAPI Byte Count Low Register
ATA Cyl. High Register
ATAPI Byte Count High Register
ATA Drive Sel Register
ATAPI Drive Sel Register
ATA Command Register
ATAPI Command Register
A
N
0
0
1
01h
A
N
0
1
0
02h
A
N
0
1
1
03h
A
N
1
0
0
04h
A
N
1
0
1
05h
A
N
1
1
0
06h
A
N
1
1
1
07h
N
A
1
1
0
06h
ATA Alternate Status Register
ATAPI Alternate Status Register
ATA Device Control Register
ATAPI Device Control Register
Note:
“A” represents signal asserted. “N” represents signal negated.
When the
BSY
or
DRQ
bits are set in the Status Register, the Task File Registers are owned by
the KS9245. When this occurs, the host cannot write to the Task File registers. Also, when the
BSY bit is set, all Task File Registers will contain the same values as the ATA Status Register.
2.2 Host Interface Registers
Register 00h :
Acronym:
BIT 7
Packet FIFO Register (Read)
PFIFO
BIT 5
BIT 4
ATAPI Packet FIFO Register
BIT 6
BIT 3
BIT 2
BIT 1
BIT 0
The Packet FIFO Register contains 12 bytes for receiving the Packet Command. After the host
writes the
Packet Command
(A0h) into the
ATAPI Command Register
, the KS9245 will
automatically be set to receive 12-bytes of command packet from the host to store into the Packet
FIFO register
.
The firmware should then perform consecutive read operations from this register to
obtain the 12-byte packet command.
Register 01h :
ATAPI Features Register (Read)
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