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參數(shù)資料
| 型號： | LXT970A |
| 廠商： | Intel Corp. |
| 英文描述： | Dual-Speed Fast Ethernet Transceiver |
| 中文描述： | 雙速度快速以太網(wǎng)收發(fā)器 |
| 文件頁數(shù)： | 26/74頁 |
| 文件大小： | 1061K |
| 代理商： | LXT970A |
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LXT970A
—
Dual-Speed Fast Ethernet Transceiver
26
Datasheet
2.2.4
Hardware Control Interface
The Hardware Control Interface consists of MF<4:0>, CFG <1:0> and FDE input pins. This
interface is used to configure operating characteristics of the LXT970A and to determine the
MDIO Address. When MDDIS is Low, the Hardware Control Interface provides initial values for
the MDIO registers, and then passes control to the MDIO Interface.
When MDDIS is High, the Hardware Control Interface provides continuous control over the
LXT970A. Individual chip addressing allows multiple LXT970A devices to share the MII in either
mode.
Table 12
,
Table 13
and
Table 14
show how to set up the desired operating configurations
using the Hardware Control Interface.
.
Table 12. Configuring the LXT970A via Hardware Control
Desired Configuration
Pin Name
Voltage Level
MDIO Registers
Auto-Negotiation Enabled
1
MF0
V
MF
2, V
MF
3
0.12 = 1
Auto-Negotiation Disabled
2
MF0
V
MF
1, V
MF
4
0.12 = 0
Normal Operation
(DTE Mode, Nibble Mode, Scrambler Enabled)
MF1
MF2
MF3
V
MF
1, V
MF
4
19.13 = 0
19.4 = 0
19.3 = 0
Repeater Mode
MF1
V
MF
2, V
MF
3
19.13 = 1
Symbol Mode
MF2
V
MF
2, V
MF
3
19.4 = 1
Scrambler Bypass Mode
MF3
V
MF
2, V
MF
3
19.3 = 1
1. Refer to
Table 13
for Hardware Control Interface functions available when auto-negotiation is enabled.
2. Refer to
Table 14
for Hardware Control Interface functions available when auto-negotiation is disabled.
Table 13. LXT970A Operating Configurations / Auto-Negotiation Enabled
Desired
Configuration
1,2
Input Value
MDIO Registers
MF4
CFG1
FDE
4.5
4.6
4.7
4.8
Advertise All
V
MF
1, V
MF
4
Low
Ignore
1
1
1
1
Advertise 100 HD
V
MF
2, V
MF
3
Low
Low
0
0
1
0
Advertise 100 HD/FD
V
MF
2, V
MF
3
Low
High
0
0
1
1
Advertise 10 HD
V
MF
1, V
MF
4
High
Low
1
0
0
0
Advertise 10 HD/FD
V
MF
1, V
MF
4
High
High
1
1
0
0
Advertise 10/100 HD
V
MF
2, V
MF
3
High
Low
1
0
1
0
Advertise 10/100 HD/FD
V
MF
2, V
MF
3
High
High
1
1
1
1
1. Refer to
Table 12
for basic configurations.
2. Refer to
Table 14
for Hardware Control Interface functions available when auto-negotiation is disabled.
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