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參數(shù)資料
| 型號(hào)： | LXT970A |
| 廠商： | Intel Corp. |
| 英文描述： | Dual-Speed Fast Ethernet Transceiver |
| 中文描述： | 雙速度快速以太網(wǎng)收發(fā)器 |
| 文件頁數(shù)： | 33/74頁 |
| 文件大?。?/td> | 1061K |
| 代理商： | LXT970A |
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Dual-Speed Fast Ethernet Transceiver
—
LXT970A
Datasheet
33
2.6.2
100BASE-X Network Operations
During 100BASE-X operation, the LXT970A transmits and receives 5-bit symbols across the
network link.
Figure 13
shows the structure of a standard frame packet. When the MAC is not
actively transmitting data, the LXT970A sends out Idle symbols on the line.
In 100TX mode, the LXT970A scrambles the data using a polynomial key, and transmits it to the
network using MLT-3 line code. The MLT-3 signals received from the network are descrambled
and decoded by the LXT970A, and sent across the MII to the MAC.
In 100FX mode, the LXT970A transmits and receives NRZI signals across the pseudo-ECL
interface. An external 100FX transceiver module is required to complete the fiber connection. To
enable 100FX operation, auto-negotiation must be disabled and FX selected.
Figure 13. 100BASE-TX Frame Structure
Figure 14. 100BASE-TX Data Flow
P0
P1
P6
SFD
64-Bit Preamble
(8 Octets)
Start of Frame
Delimiter (SFD)
DA
DA
SA
SA
Destination and Source
Address (6 Octets each)
L1
L2
Packet Length
(2 Octets)
D0
D1
Dn
Data Field
(Pad to minimum packet size)
Frame Check Field
(4 Octets)
CRC
I0
InterFrame Gap / Idle Code
(> 12 Octets)
Replaced by
/T/R/ code-groups
End of Stream Delimiter (ESD)
IFG
Replaced by
/J/K/ code-groups
Start of Stream
Delimiter (SSD)
Standard Data Flow
D0
D1
D2
D3
Parallel
to
Serial
Serial
to
Parallel
D0
D1
D2
D3
4B/5B
S0
S1
S2
S3
S4
MLT3
0
+1
-1
0
0
Transition = 1.
No Transition = 0.
All transitions must follow
pattern: 0, +1, 0, -1, 0, +1...
Scramble
De-
Scramble
S0
S1
S2
S3
S4
Parallel
to
Serial
Serial
to
Parallel
S0
S1
S2
S3
S4
MLT3
0
+1
-1
0
0
Transition = 1.
No Transition = 0.
All transitions must follow
pattern: 0, +1, 0, -1, 0, +1...
Scramble
De-
Scramble
Symbol (5B) Mode Data Flow
S0
S1
S2
S3
S4
Parallel
to
Serial
Serial
to
Parallel
MLT3
0
+1
-1
0
0
Transition = 1.
No Transition = 0.
All transitions must follow
pattern: 0, +1, 0, -1, 0, +1...
Scrambler Bypass Data Flow
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| LXT970 | Fast Ethernet Transceiver |
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| LXT971A | 3.3V Dual-Speed Fast Ethernet PHY Transceiver |
| LXT972A | 3.3V Dual-Speed Fast Ethernet Transceiver Datasheet |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LXT970AQC | 制造商:LEVEL ONE 功能描述: 制造商:LEVELONE 功能描述: 制造商: 功能描述: 制造商:LEVEL1 功能描述: |
| LXT970AQC.B11 | 制造商:Intel 功能描述: |
| LXT970ATC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Telecomm/Datacomm |
| LXT970QC | 制造商:LEVEL ONE 功能描述: 制造商:Level One 功能描述:LAN Transceiver, Single, 64 Pin, Plastic, QFP 制造商:Level One Communications 功能描述:LAN Transceiver, Single, 64 Pin, Plastic, QFP |
| LXT971A | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:3.3V Dual-Speed Fast Ethernet PHY Transceiver |
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