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參數(shù)資料
| 型號(hào)： | LXT970A |
| 廠(chǎng)商： | Intel Corp. |
| 英文描述： | Dual-Speed Fast Ethernet Transceiver |
| 中文描述： | 雙速度快速以太網(wǎng)收發(fā)器 |
| 文件頁(yè)數(shù)： | 70/74頁(yè) |
| 文件大?。?/td> | 1061K |
| 代理商： | LXT970A |
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LXT970A
—
Dual-Speed Fast Ethernet Transceiver
70
Datasheet
Table 53. Interrupt Enable Register (Address 17, Hex 11)
Bit
Name
Description
Type
1
Default
17.15:4
Reserved
Write as 0; ignore on read.
R/W
N/A
17.3
MIIDRVLVL
1 = Reduced MII driver levels. Pull-down strength of the MII driver is
reduced by a factor of 10, and the pull-up strength is reduced by a factor
of 8. Reduced driver levels on the MII I/O pins are recommended for
managed multi-port applications.
0 = High-strength MII driver levels that can effectively source 50 - 60 mA.
Series termination resistors (55
)
are recommended on all output
signals when using this level to avoid undershoot or overshoot.
R/W
0
17.2
LNK
CRITERIA
1 = Enhanced link loss criteria. Link loss criteria is independent of symbol
error rate. Loss of scrambler lock for more than 1 - 2 msec will brings the
link down. Link up criteria is based on symbol error rate.
0 = Standard link criteria. Both link up and link loss are based on symbol
error rate.
R/W
0
17.1
INTEN
1 = Enable interrupts. Must be enabled for bit 17.0 or 19.12 to be
effective.
0 = Disable interrupts.
R/W
0
17.0
TINT
1 = Forces MDINT Low and sets bit 18.15 = 1. Also forces interrupt
pulse on MDIO when bit 19.12 = 1.
0 = Normal operation.
This bit is ignored unless the interrupt function is enabled (17.1 = 1).
R/W
0
1. R/W = Read /Write
Table 54. Interrupt Status Register (Address 18, Hex 12)
Bit
Name
Description
Type
1
Default
18.15
MINT
1 = Indicates MII interrupt pending.
0 = Indicates no MII interrupt pending. This bit is cleared by reading
Register 1 followed by reading Register 18.
RO
N/A
18.14
XTALOK
1 = Indicates that the LXT970A is fully powered up and the on-chip clocks
are stable.
0 = Indicates that XTAL circuit is not stable.
RO
0
18.13:0
Reserved
Ignore
RO
0
1. RO = Read Only
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| LXT970 | Fast Ethernet Transceiver |
| LXT970QC | Fast Ethernet Transceiver |
| LXT971A | 3.3V Dual-Speed Fast Ethernet PHY Transceiver |
| LXT972A | 3.3V Dual-Speed Fast Ethernet Transceiver Datasheet |
| LXT972ALC | 3.3V Dual-Speed Fast Ethernet Transceiver Datasheet |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LXT970AQC | 制造商:LEVEL ONE 功能描述: 制造商:LEVELONE 功能描述: 制造商: 功能描述: 制造商:LEVEL1 功能描述: |
| LXT970AQC.B11 | 制造商:Intel 功能描述: |
| LXT970ATC | 制造商:未知廠(chǎng)家 制造商全稱(chēng):未知廠(chǎng)家 功能描述:Telecomm/Datacomm |
| LXT970QC | 制造商:LEVEL ONE 功能描述: 制造商:Level One 功能描述:LAN Transceiver, Single, 64 Pin, Plastic, QFP 制造商:Level One Communications 功能描述:LAN Transceiver, Single, 64 Pin, Plastic, QFP |
| LXT971A | 制造商:INTEL 制造商全稱(chēng):Intel Corporation 功能描述:3.3V Dual-Speed Fast Ethernet PHY Transceiver |
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