Clock asynchronous serial I/O (UART) mode
deveopmen
Rev.B2 for proof reading
Mitsubishi Microcomputers
M32C/83 group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
183
Pin name
TxDi
(P6
3
, P6
7
, P7
0
,
P9
2
, P9
6
)
Function
Method of selection
Serial data output
(Note 1)
Serial data input
(Note 2)
Programmable I/O port
(Note 2)
Transfer clock input
(Note 2)
Programmable I/O port
(Note 2)
Internal/external clock select bit (bit 3 at addresses 0368
16
, 02E8
16
,
0338
16
, 0328
16
, 02F8
16
) =
“
0
”
Internal/external clock select bit (bit 3 at addresses 0368
16
, 02E8
16
,
0338
16
, 0328
16
, 02F8
16
) =
“
1
”
Port P6
1
, P6
5
, P7
2
, P9
0
and P9
5
direction register (bits 1 and 5 at address
03C2
16
, bit 2 at address 03C3
16
, bits 0 and 5 at address 03C7
16
) =
“
0
”
Port P6
2
, P6
6
, P7
1
, P9
1
and P9
7
direction register (bits 2 and 6 at address
03C2
16
, bit 1 at address 03C3
16
, bit 1 and 7 at address 03C7
16
)=
“
0
”
(Can be used as an input port when performing transmission only)
CTS/RTS disable bit (bit 4 at addresses 036C
16
, 02EC
16
, 033C
16
,
032C
16
, 02FC
16
) =
“
0
”
CTS/RTS function select bit (bit 2 at addresses 036C
16
, 02EC
16
, 033C
16
,
032C
16
, 02FC
16
) =
“
0
”
Port P6
0
, P6
4
, P7
3
, P9
3
and P9
4
direction register (bits 0 and 4 at address
03C2
16
, bit 3 at address 03C3
16
, bits 3 and 4 at address 03C7
16
) =
“
0
”
CTS input
(Note 2)
RTS output
RxDi
(P6
2
, P6
6
, P7
1
,
P9
1
, P9
7
)
CLKi
(P6
1
, P6
5
, P7
2
,
P9
0
, P9
5
)
CTSi/RTSi
(P6
0
, P6
4
, P7
3
,
P9
3
, P9
4
)
CTS/RTS disable bit (bit 4 at addresses 036C
16
, 02EC
16
, 033C
16
, 032C
16
,
02FC
16)
=
“
0
”
CTS/RTS function select bit (bit 2 at addresses 036C
16
, 02EC
16
, 033C
16
,
032C
16
, 02FC
16
) =
“
1
”
CTS/RTS disable bit (bit 4 at addresses 036C
16
, 02EC
16
, 033C
16
, 032C
16
,
02FC
16
) =
“
1
”
(Note 1)
Table 1.19.2. Specifications of UART Mode (2/2)
Item
Error detection
Specification
Framing error
This error occurs when the number of stop bits set is not detected
Parity error
If parity is enabled this error occurs when, the number of 1
’
s in parity and character
bits does not match the number of 1
’
s set
Error sum flag
This flag is set (= 1) when any of the overrun, framing, and parity errors is encoun-
tered
Serial data logic switch
This function reveres the logic value of transferring data. Start bit, parity bit and stop
bit are not reversed.
TxD, RxD I/O polarity switch
This function reveres the TxD port output and RxD port input. All I/O data level is
reversed.
Select function
Table 1.19.3 lists the functions of the input/output pins in UART mode. Note that for a period from when
the UARTi operation mode is selected to when transfer starts, the TxDi pin outputs a
“
H
”
. (If the N-
channel open drain is selected, this pin is in floating state.)
Table 1.19.3. Input/output pin functions in UART mode
Note 1: Select TxD output, CLK output and RTS output by the corresponding function select registers A, B and C.
Note 2: Select I/O port by the corresponding function select register A.