deveopmen
Bus Settings
Rev.B2 for proof reading
Mitsubishi Microcomputers
M32C/83 group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
53
External data bus width control register
b7
b6
b5
b4
b3 b2
b1
Symbol
DS
Address
000B
16
When reset
XXXXX000
2
Bit name
Function
Bit symbol
b0
DS3
DS1
DS0
External area 0 data bus
width bit
External area 1 data bus
width bit
External area 2 data bus
width bit
External area 3 data bus
width bit (Note)
DS2
0 : 8 bits data bus width
1 : 16 bits data bus width
0 : 8 bits data bus width
1 : 16 bits data bus width
0 : 8 bits data bus width
1 : 16 bits data bus width
0 : 8 bits data bus width
1 : 16 bits data bus width
Note: The value after a reset is determined by the input via the BYTE pin.
When BYTE pin is "L", DS3 is "1". When "H", it is "0".
W
R
AA
AA
AA
AA
Nothing is assigned.
When write, set "0". When read, their contents are indeterminate.
External area mode
(Note 2)
Mode 0
Mode 1
Mode 2
Mode 3
E
E
a
a
E
a
E
a
Memory expansion mode
Memory expansion mode
,
Microprocessor mode
Microprocessor mode
Memory expansion mode
,
Microprocessor mode
008000
16
to
1FFFFF
16
200000
16
to
3FFFFF
16
400000
16
to
BFFFFF
16
(Note 1)
C00000
16
to
EFFFFF
16
C00000
16
to
FFFFFF
16
<CS1 area>
008000
16
to
1FFFFF
16
<CS2 area>
200000
16
to
3FFFFF
16
<DRAMC area>
400000
16
to
BFFFFF
16
<CS0 area>
C00000
16
to
EFFFFF
16
<CS0 area>
E00000
16
to
FFFFFF
16
<CS1 area>
008000
16
to
1FFFFF
16
<DRAMC area>
400000
16
to
BFFFFF
16
<CS0 area>
C00000
16
to
EFFFFF
16
<CS0 area>
C00000
16
to
FFFFFF
16
<CS1 area>
100000
16
to
1FFFFF
16
<CS2 area>
200000
16
to
2FFFFF
16
<CS3 area>
C00000
16
to
CFFFFF
16
<CS0 area>
E00000
16
to
EFFFFF
16
<CS0 area>
F00000
16
to
FFFFFF
16
Memory expansion mode
,
Microprocessor mode
No area is
selected.
accessing memory using the multiplex bus configuration, two waits are inserted regardless of whether
you select
“
No wait
”
or
“
1 wait
”
in the appropriate bit of the wait control register.
The default after a reset is a separate bus configuration, and the full CS space multiplex bus configu-
ration cannot be selected in microprocessor mode. If you select
“
Full CS space multiplex bus
”
, the 16
bits from A0 to A15 are output for the address
Figure 1.7.1. External data bus width control register
Table 1.7.2. External area 0 to 3 and external area mode
Note 1: DRAMC area when using DRAMC.
Note 2:Set the external area mode (modes 0, 1, 2, and 3) using bits 0 and 1 of the processor mode register
1 (address 0005
16
).