deveopmen
Intelligent I/O
Rev.B2 for proof reading
Mitsubishi Microcomputers
M32C/83 group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
253
Group i waveform generation control register j (i=0 to 1/ j=0 to 7)
(Note 1)
Symbol
GiPOCRj (i=0/j=0,1)
GiPOCRj (i=0/j=4,5)
GiPOCRj (i=1/j=0 to 3)
GiPOCRj (i=1/j=4 to 7)
Address
00D0
16
, 00D1
16
00D4
16
, 00D5
16
0110
16
, 0111
16
, 0112
16
, 0113
16
0114
16
, 0115
16
, 0116
16
, 0117
16
When reset
0X00X000
2
0X00X000
2
0X00X000
2
0X00X000
2
R W
Bit name
Function
Bit
symbol
MOD0
MOD1
MOD2
Operation mode
select bit
Output initial value
select bit
IVL
RLD
INV
0: Outputs "0" as the initial value
1: Outputs "1" as the initial value
Inverted output function
select bit
b1
0
0
1
1
0
0
1
1
b0
0
1
0
1
0
1
0
1
: Single PWM mode
: S-R PWM mode
: Phase delayed PWM mode
: Must not be set
: Must not be set
: Must not be set
: Must not be set
: Assigns communication output
to a port
0: Reloads a new count when CPU
writes the count
1: Reloads a new count when the
base timer i is reset
0: Output is not inverted
1: Output is inverted
b2
0
0
0
0
1
1
1
1
Must always set to "0"
When read, the value of this bit is indeterminate.
Reload timing
select bit
(Note 3)
(Note 4)
(Note 5)
Must always set "0"
When read, the value of this bit is indeterminate.
(Note 2)
Note 1: Group 0 and 1 have 16-bit WG function and 32-bit WG function.
The 16-bit WG function is available for 4 channels (ch=0,1,4,5) with group 0 and 8 channels
(ch=0 to 7) with group 1. When using the 16-bit WG function, use the WG register values for ch2,
3, 6 and 7 of group 0 as they are, or, if writing values, write "00
16
".
The 32-bit WG function can be used with 8 channels (ch0 to 7) by linking groups 0 and 1.
When using the 32-bit WG function, write the same value for WG registers of similar channels in
groups 0 and 1.
Note 2: This setting is valid only on even-numbered channels. When this mode is selected, settings for
corresponding odd-numbered (even number + 1) channels are ignored. Waveforms are output for
even-numbered channels, not output for odd-numbered channels.
Note 3: When receiving in UART mode of group 0 and 1, group i WG control register 2 is set to be
"00000110
2
".
Note 4: This setting is valid only for WG function ch0 and 1. Do not set this value for other channels.
Note 5: Inverted output function is allocated at the final stage of WG circuit. Therefore, when selecting
b7
b0
Figure 1. 23. 17. WG-related register (2)